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ICS1893AGILF Datasheet(PDF) 98 Page - Integrated Circuit Systems |
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ICS1893AGILF Datasheet(HTML) 98 Page - Integrated Circuit Systems |
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98 / 135 page ![]() ICS1893AG, Rev A 04/14/05 April, 2005 98 Chapter 9 Pin Diagram, Listings, and Descriptions ICS1893AG Data Sheet - Preliminary Copyright © 2005, Integrated Circuit Systems, Inc. All rights reserved. 9.2 ICS1893AG Pin Descriptions Table 9-1. MAC/Repeater Interface Pins Signal Name Pin No. Signal Description MDIO 32 Management Data Input/Output MDC 33 Management Data Clock RXD3 34 Receive Data 3 RXD2 35 Receive Data 2 RXD1 36 Receive Data 1 RXD0 37 Receive Data 0 RXDV 38 Receive Data Valid RXCLK 40 Receive Clock RXER 41 Receive Error TXCLK 45 Transmit Clock TXEN 46 Transmit Enable TXD0 47 Transmit Data 0 TXD1 48 Transmit Data 1 TXD2 49 Transmit Data 2 TXD3 50 Transmit Data 3 COL 51 Collision Detect CRS 52 Carrier Sense Table 9-2. Transformer Interface Pins Signal Name Pin No. Signal Description TP_TXP 13 Twisted Pair Transmit Positive TP_TXN 14 Twisted Pair Transmit Negative TP_CT 11 Twisted Pair Center Tap TP_RXP 21 Twisted Pair Receive Positive TP_RXN 22 Twisted Pair Receive Negative Table 9-3. Multifunction Pins: PHY Address and LED Pins Signal Name Pin No. Signal Description P4RD 8 Bit 4 of PHY Address, PHYAD[4], OR Receive LED P3TD 6 Bit 3 of PHY Address, PHYAD[3], OR Transmit LED P2LI 4 Bit 2 of PHY Address, PHYAD[2], OR Link Integrity LED P1CL 3 Bit 1 of PHY Address, PHYAD[1], OR Collision LED P0AC 1 Bit 0 of PHY Address, PHYAD[0], OR Activity LED |
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