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LT8640 Datasheet(PDF) 3 Page - Analog Devices

Part # LT8640
Description  8V, 16A Synchronous Step-Down Silent Switcher 2
PDF  22 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT8640 Datasheet(HTML) 3 Page - Analog Devices

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LT8644S
3
Rev. 0
For more information www.analog.com
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT8644SI is guaranteed over the full –40°C to 125°C
operating junction temperature range. The junction temperature (TJ, in °C)
is calculated from the ambient temperature (TA in °C) and power
dissipation (PD, in Watts) according to the formula:
TJ = TA + (PD • θJA)
where θJA (in °C/W) is the package thermal impedance.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Feedback Voltage Line Regulation
VIN = 3.0V to 8V
l
0.025
0.12
%/V
Feedback Pin Input Current
VFB = 0.6V
–20
20
nA
Error Amplifier Transconductance
VC = 1.25V
1.1
1.45
1.8
mS
Error Amp Gain
650
VC Source Current
VFB = 0.4V, VC = 1.25V
320
µA
VC Sink Current
VFB = 0.8V, VC = 1.25V
320
µA
VC Pin to Switch Current Gain
18
A/V
VC Clamp Voltage
2.3
V
SVIN Pin Current Consumption
SVIN = 5V, fSW = 2MHz
20
mA
Minimum On-Time
ILOAD = 4A, SYNC = 2V
l
20
35
ns
Minimum Off-Time
75
100
ns
Oscillator Frequency
RT = 147k
RT = 38.3k
RT = 16.9k
l
l
l
260
0.95
1.95
300
1
2
340
1.05
2.05
kHz
MHz
MHz
Top Power NMOS On-Resistance
12
mΩ
Bottom Power NMOS On-Resistance
VINTVCC = 3.6V
4.3
mΩ
Top Power NMOS Current Limit
l
25
30
33
A
Bottom Power NMOS Current Limit
VINTVCC = 3.6V
15.5
21
26.5
A
SW Leakage Current
VIN = 8V, VSW = 0V, 8V
–10
10
µA
EN/UV Pin Threshold
EN/UV Rising
l
0.93
0.98
1.03
V
EN/UV Pin Hysteresis
40
mV
EN/UV Pin Current
VEN/UV = 2V
–20
20
nA
PG Upper Threshold Offset from VFB
VFB Rising
l
6.25
7.75
9.25
%
PG Lower Threshold Offset from VFB
VFB Falling
l
–9.25
–7.75
–6.25
%
PG Hysteresis
0.4
%
PG Leakage
VPG = 3.3V
–40
40
nA
PG Pull-Down Resistance
VPG = 0.1V
l
600
2000
Ω
SYNC/MODE Threshold
SYNC/MODE DC and Clock Low Level Voltage
SYNC/MODE Clock High Level Voltage
SYNC/MODE DC High Level Voltage
l
l
l
0.5
VINTVCC – 1.1
1.5
VINTVCC – 0.5
V
V
V
Spread Spectrum Modulation
Frequency Range
RT = 38.3k, VSYNC = 3.3V
25
%
Spread Spectrum Modulation Frequency
VSYNC = 3.3V
3
kHz
SS Source Current
l
1.3
2.0
2.7
µA
SS Pull-Down Resistance
Fault Condition, SS = 0.1V
200
Ω
PHMODE Thresholds
Between 180° and 120°
Between 120° and 90°
0.7
VINTVCC – 1.3
1.4
VINTVCC – 0.6
V
V
Note 3: θ values determined per JEDEC 51-7, 51-12. See the Applications
Information section for information on improving the thermal resistance
and for actual temperature measurements of a demo board in typical
operating conditions.
Note 4: This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.



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