SH7041A datasheet(162/923 Pages) RENESAS

Part #	SH7041A

Description	Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)

PDF	923 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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162 / 923 page

124

Bit:

——

———

—

Initial value:

R/W:

Bit:

CP1

CP0

ID1

ID0

RW1

RW0

SZ1

SZ0

Initial value:

R/W:

R/W

Bits 15–8—Reserved: These bits always read as 0. The write value should always be 0.

• Bits 7 and 6—CPU Cycle/Peripheral Cycle Select (CP1, CP0): These bits designate break

conditions for CPU cycles or peripheral cycles (DMA/DTC cycles).

Bit 7: CP1

Bit 6: CP0

Description

No user break interrupt occurs (initial value)

Break on CPU cycles

Break on peripheral cycles

Break on both CPU and peripheral cycles

• Bits 5 and 4—Instruction Fetch/Data Access Select (ID1, ID0): These bits select whether to

break on instruction fetch and/or data access cycles.

Bit 5: ID1

Bit 4: ID0

Description

No user break interrupt occurs (initial value)

Break on instruction fetch cycles

Break on data access cycles

Break on both instruction fetch and data access cycles

SH7041A Datasheet(PDF) 162 Page - Renesas Technology Corp