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LTC6804 Datasheet(PDF) 42 Page - Analog Devices

Part # LTC6804
Description  6 Channel Battery Stack Monitors
PDF  90 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
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LTC6804 Datasheet(HTML) 42 Page - Analog Devices

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LTC6810-1/LTC6810-2
42
Rev. A
For more information www.analog.com
OPERATION
COMM Commands
Three commands help accomplish I2C or SPI communica-
tion to the slave device: WRCOMM, STCOMM, RDCOMM
WRCOMM Command: This command is used to write
data to the COMM register. This command writes 6 bytes
of data to the COMM register. The PEC needs to be written
at the end of the data. If the PEC does not match, all data
in the COMM register is cleared to 1s when CSB goes
high. See the Bus Protocols section for more details on a
write command format.
STCOMM Command: This command initiates I2C/SPI
communication on the GPIO ports. The COMM register
contains 3 bytes of data to be transmitted to the slave.
During this command, the data bytes stored in the COMM
register are transmitted to the slave I2C or SPI device and
the data received from the I2C or SPI device is stored in
the COMM register. This command uses GPIO3 (SDA)
and GPIO4 (SCL) for I2C communication or GPIO2
(CSBM), GPIO3 (SDIOM) and GPIO4 (SCKM) for SPI
communication.
The STCOMM command is to be followed by 24 clock
cycles for each byte of data to be transmitted to the slave
device while holding CSB low. For example, to transmit 3
bytes of data to the slave, send STCOMM command and
its PEC followed by 72 clock cycles. Pull CSB high at the
end of the 72 clock cycles of STCOMM command.
During I2C or SPI communication, the data received from
the slave device is updated in the COMM register.
RDCOMM Command: The data received from the slave
device can be read back from the COMM register using the
RDCOMM command. The command reads back 6 bytes of
data followed by the PEC. See the Bus Protocols section
for more details on a read command format.
Table  24 describes the possible read back codes for
ICOMn[3:0] and FCOMn[3:0] when using the part as an
I2C master. Dn[3:0] contains the data byte transmitted by
the I2C slave.
In case of the SPI master, the read back codes for
ICOMn[3:0] and FCOMn[3:0] are always 0111 and 1111
respectively. Dn[3:0] contains the data byte transmitted
by the SPI slave.
Table 24. Read Codes for ICOMn[3:0] and FCOMn[3:0] on I2C Master
CONTROL BITS
CODE DESCRIPTION
ICOMn[3:0]
0110
Master generated a START signal.
0001
Master generated a STOP signal.
0000
Blank, SDA was held low between bytes.
0111
Blank, SDA was held high between bytes.
FCOMn[3:0]
0000
Master generated an ACK signal.
0111
Slave generated an ACK signal.
1111
Slave generated a NACK signal.
0001
Slave generated an ACK signal, master
generated a STOP signal.
1001
Slave generated a NACK signal, master
generated a STOP signal.
Figure 18 illustrates the operation of LTC6810 as an I2C
or SPI master using the GPIOs.
Figure 18.
68101 F18
COMM
REGISTER
GPIO
PORT
I2C/SPI
SLAVE
PORT A
RDCOMM
WRCOMM
STCOMM
LTC6810-1/LTC6810-2
LTC6810 I2C/SPI Master using GPIOs
Any number of bytes can be transmitted to the slave in
groups of 3 bytes using these commands. The GPIO
ports will not get reset between different STCOMM com-
mands. However, if the wait time between the commands
is greater than 2s, the watchdog will time out and reset
the ports to their default values.
To transmit several bytes of data using an I2C master,
a START signal is only required at the beginning of the
entire data stream. A STOP signal is only required at the
end of the data stream. All intermediate data groups can
use a BLANK code before the data byte and an ACK/NACK
signal as appropriate after the data byte. SDA and SCL
will not get reset between different STCOMM commands.
To transmit several bytes of data using SPI master, a
CSBM low signal is sent at the beginning of the 1st data
byte. CSBM can be held low or taken high for intermediate
data groups using the appropriate code on FCOMn[3:0].



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