LTC6804 datasheet(24/90 Pages) AD

24 / 90 page

LTC6810-1/LTC6810-2

Rev. A

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OPERATION

ADC OPERATION

There is one ADC inside the LTC6810. The ADC is used to

measure the cell voltages via the C or S pins and general

purpose inputs.

ADC Modes

The ADCOPT bit (CFGR0[0]) in the Configuration Register

Group and the mode selection bits MD[1:0] in the conver-

sion command together provide eight modes of operation

for the ADC which correspond to different oversampling

ratios (OSR). The accuracy and timing of these modes

are summarized in Table 3. In each mode, the ADC first

measures the inputs, and then performs a calibration. The

names of the modes are based on the –3dB bandwidth of

the ADC measurement.

Mode 7kHz (Normal Mode): In this mode, the ADC has

high resolution and low TME (total measurement error).

This is considered the normal operating mode because of

the optimum combination of speed and accuracy.

Mode 27kHz (Fast Mode): In this mode, the ADC has

maximum throughput but has some increase in TME (total

measurement error). So this mode is also referred to as

the fast mode. The increase in speed comes from a reduc-

tion in the oversampling ratio. This results in an increase

in noise and average measurement error.

Mode 26Hz (Filtered Mode): In this mode, the ADC digital

filter –3dB frequency is lowered to 26Hz by increasing the

OSR. This mode is also referred to as the filtered mode

due to its low –3dB frequency. The accuracy is similar to

the 7kHz (normal) mode with lower noise.

Modes 14kHz, 3kHz, 2kHz, 1kHz and 422Hz: Modes

14kHz, 3kHz, 2kHz, 1kHz and 422Hz provide additional

options to set the ADC digital filter –3dB at 13.5kHz,

3.4kHz, 1.7kHz, 845Hz and 422Hz respectively. The accu-

racy of the 14kHz mode is similar to the 27kHz (fast)

mode. The accuracy of 3kHz, 2kHz, 1kHz and 422Hz

modes is similar to the 7kHz (normal) mode.

The filter bandwidths and the conversion times for these

modes are provided in Table 3 and Table 5. If the Core is

in STANDBY state, an additional tREFUP time is required to

power up the reference before beginning the ADC conver-

sions. The reference can remain powered up between ADC

conversions if the REFON bit in Configuration Register

Group is set to 1 so the Core is in REFUP state after a

delay tREFUP. If REFON is set to 1 the Core will go from

STANDBY to the REFUP state after a delay tREFUP. Then,

the subsequent ADC commands will not have the tREFUP

delay before beginning ADC conversions.

ADC Range and Resolution

The cell inputs and GPIO inputs have the same range and

resolution. The ADC inside the LTC6810 has an approxi-

mate range from –0.82V to +5.73V. Negative readings are

rounded to 0V. The format of the data is a 16-bit unsigned

integer where the LSB represents 100µV. Therefore, a

reading of 0x80E8 (33,000 decimal) indicates a measure-

ment of 3.3V.

Figure 5.

ADC INPUT VOLTAGE (V)

0.1

0.9

0.7

0.5

0.3

0.8

0.6

0.4

0.2

2.5

4.5

1.5

3.5

68101 F05

0.5

NORMAL MODE

FILTERED MODE

Delta-Sigma ADCs have quantization noise which depends

on the input voltage, especially at low Over Sampling

Ratios (OSR), such as in fast mode. In some of the ADC

modes, the quantization noise increases as the input volt-

age approaches the upper and lower limits of the ADC

range. For example, the total measurement noise versus

input voltage in normal and filtered modes is shown in

Figure 5.

LTC6804 Datasheet(PDF) 24 Page - Analog Devices

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