BGU8821 datasheet(11/41 Pages) NXP

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NXP Semiconductors

BGU8821/A

Dual channel low-noise high linearity amplifier with DSA and SPDT

BGU8821/A

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Product data sheet

Rev. 6 — 15 April 2020

11 / 41

Bits

Name

Access

Value

Description

Switches SPI bus between 3-wire and 4-wire modes

3-wire mode with <SDIO> as bidirectional input and output

4WIRE_MODE

R/W

4-wire mode with <SDIO> as unidirectional input and

<SDO> as unidirectional output pins. Bit shall be set HIGH

together with bit [4]

Sets register address read/write order for the streaming (multi-byte)

SPI access mode

Auto-decrementing register address order in the streaming

mode

ADRESS_INCREMENT

R/W

Auto-incrementing register address order in the streaming

mode. Bit shall be set HIGH together with bit [5]

Sets MSB_FIRST (default) or LSB_FIRST mode of operation

MSB_FIRST mode. The data is entered with MSB first and

LSB last

LSB_FIRST

R/W

LSB_FIRST mode. The data is entered with LSB first and

MSB last. Bit shall be set HIGH together with bit [6]

SPI reset bit. All registers are reverted to default state when bit is set

HIGH

Normal operation

SPI_FIRST

Resets all registers from address 0x02h up to 0x17h to

default states. Bit shall be set HIGH together with bit [7]. Bit

value resets back to LOW level after command is executed.

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