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SY87700AL Datasheet(PDF) 1 Page - Microchip Technology |
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SY87700AL Datasheet(HTML) 1 Page - Microchip Technology |
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1 / 22 page ![]() 2021 Microchip Technology Inc. and its subsidiaries DS20006628A-page 1 SY87700AL Features • 3.3V Power Supply • SONET/SDH/ATM Compatible • Clock and Data Recovery from 32 Mbps Up to 208 Mbps NRZ Data Stream; Clock Generation from 32 Mbps to 208 Mbps • Two On-Chip PLLs: One for Clock Generation and Another for Clock Recovery • Selectable Reference Frequencies • Differential PECL High-Speed Serial I/O • Line Receiver Input: No External Buffering Needed • Link Fault Indication • 100K ECL-Compatible I/O • Industrial Temperature Range: –40°C to +85°C • Low Power: Fully Compatible SY87700V, but Consumes 30% Less Power • Available in a 32-Lead ePAD TQFP Package Applications • SONET/SDH/ATM OC-1 and OC-3 • Fast Ethernet, SMPTE 259 • Proprietary Architecture Up to 208 Mbps General Description The SY87700AL is a complete clock recovery and data re-timing integrated circuit for data rates from 32 Mbps up to 208 Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems. Clock recovery and data re-timing is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87700AL also includes a link fault detection circuit. Low-Power, 3.3V, 32 Mbps to 208 Mbps AnyRate® Clock and Data Recovery |
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