AD9772A-EB datasheet(23/40 Pages) AD

23 / 40 page

AD9772A

Rev. C | Page 23 of 40

1.2V REF

REFIO

FSADJ

CURRENT

SOURCE

ARRAY

250pF

REFLO

AVDD

AD9772A

2kΩ

0.1µF

ADDITIONAL

LOAD

OPTIONAL

EXTERNAL

REF BUFFER

2.7V TO 3.6V

Figure 38. Internal Reference Configuration

The internal reference can be disabled by connecting REFLO to

AVDD. In this case, an external 1.2 V reference, such as the

AD1580, can be applied to REFIO as shown in Figure 39. The

external reference can provide either a fixed reference voltage to

enhance accuracy and drift performance or a varying reference

voltage to improve gain control. Note that the 0.1 μF compensation

capacitor is not required because the internal reference is disabled

and the high input impedance of REFIO minimizes any loading

of the external reference.

+1.2V REF

REFIO

FSADJ

CURRENT

SOURCE

ARRAY

250pF

REFLO

AVDD

AD9772A

AD1580

2.7V TO 3.6V

REFERENCE

CONTROL

AMPLIFIER

RSET

IREF =

VREFIO/RSET

10kΩ

VREFIO

Figure 39. External Reference Configuration

REFERENCE CONTROL AMPLIFIER

The AD9772A also contains an internal control amplifier that is

used to regulate the DAC’s full-scale output current, IOUTFS. The

control amplifier is configured as a V-I converter, as shown in

Figure 39, such that its current output, IREF, is determined by the

ratio of the VREFIO and an external resistor, RSET, as stated in

Equation 4. IREF is copied to the segmented current sources with

the proper scaling factor to set IOUTFS as stated in Equation 3.

The control amplifier allows a wide (10:1) adjustment span of

IOUTFS over a 2 mA to 20 mA range by setting IREF between

62.5 μA and 625 μA. The wide adjustment span of IOUTFS pro-

vides several application benefits. The first benefit relates

directly to the power dissipation of the AD9772A DAC, which

is proportional to IOUTFS (see the Power Dissipation section).

The second benefit relates to the 20 dB adjustment, which is

useful for system gain control purposes.

IREF can be controlled using the single-supply circuit shown in

Figure 40 for a fixed RSET. In this example, the internal refer-

ence is disabled, and the voltage of REFIO is varied over its

compliance range of 1.25 V to 0.10 V. REFIO can be driven by a

single-supply DAC or digital potentiometer, thus allowing IREF

to be digitally controlled for a fixed RSET. This particular example

shows the AD5220, an 8-bit serial input digital potentiometer,

along with the AD1580 voltage reference. Note that because the

input impedance of REFIO does interact with and load the

digital potentiometer wiper to create a slight nonlinearity in the

programmable voltage divider ratio, a digital potentiometer

with 10 kΩ or less resistance is recommended.

1.2V REF

REFIO

FSADJ

CURRENT

SOURCE

ARRAY

250pF

REFLO

AVDD

AD9772A

AD1580

2.7V TO 3.6V

RSET

10kΩ

AD5220

1.2V

Figure 40. Single-Supply Gain Control Circuit

ANALOG OUTPUTS

The AD9772A produces two complementary current outputs,

IOUTA and IOUTB, which can be configured for single-ended or

differential operation. IOUTA and IOUTB can be converted into

complementary single-ended voltage outputs, V

OUTA

and VOUTB,

via a load resistor, RLOAD, as described in the

section, by using Equation 5 through Equation 8. The

differential voltage, V

DAC Transfer

Function

DIFF

, existing between VOUTA and VOUTB, can

also be converted to a single-ended voltage via a transformer or

differential amplifier configuration.

Figure 41 shows the equivalent analog output circuit of the

AD9772A, which consists of a parallel combination of PMOS

differential current switches associated with each segmented

current source. The output impedance of IOUTA and IOUTB is

determined by the equivalent parallel combination of the PMOS

switches and is typically 200 kΩ in parallel with 3 pF. Due to the

nature of a PMOS device, the output impedance is also slightly

dependent on the output voltage (that is, V

OUTA

and VOUTB) and,

to a lesser extent, the analog supply voltage, AVDD, and full-

scale current, IOUTFS. Although the signal dependency of the

output impedance can be a source of dc nonlinearity and ac

linearity (that is, distortion), its effects can be limited if certain

precautions are taken.

AD9772A

AVDD

IOUTA

RLOAD

IOUTB

Figure 41. Equivalent Analog Output Circuit

IOUTA and IOUTB also have a negative and positive voltage

compliance range. The negative output compliance threshold

of −1.0 V is set by the breakdown limits of the CMOS process.

Operation beyond this maximum limit may result in a breakdown

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