RT600 datasheet(22/167 Pages) NXP

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RT600

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Product data sheet

Rev. 2.0 — 1 April 2022

22 of 165

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

PIO0_19/

CH2A

D12

Z I/O;

0 PIO0_19/CH2A — General-purpose digital input/output pin.

Analog input 2A. Can optionally be paired with CH2B for

differential input on ADC channel 2.

I/O

1 FC2_SSEL2 — Flexcomm 2: SPI slave select 2.

I2 SCT0_GPI4 — Pin input 4 to SCTimer/PWM.

O3 SCT0_OUT4 — SCTimer/PWM output 4.

I4 CTIMER_INP5 — Capture input 5 to CTIMER input muxes.

I5 UTICK_CAP0 — Micro-tick timer capture input 0.

6 R — Reserved.

7 R — Reserved.

I/O

8 SEC_PIO0_19 — Secure GPIO pin.

PIO0_20/

CH2B

E13

Z I/O;

0 PIO0_20/CH2B — General-purpose digital input/output pin.

Analog input 2B. Can optionally be paired with CH2A for

differential input on ADC channel 2.

I/O

1 FC2_SSEL3 — Flexcomm 2: SPI slave select 3.

I2 SCT0_GPI5 — Pin input 5 to SCTimer/PWM.

O3 SCT0_OUT5 — SCTimer/PWM output 5.

O4 CTIMER0_MAT2 — 32-bit CTimer0 match output 2.

I5 CTIMER_INP11 — Capture input 11 to CTIMER input muxes.

6 R — Reserved.

7 R — Reserved.

I/O

8 SEC_PIO0_20 — Secure GPIO pin.

PIO0_21

A12

Z I/O

0 PIO0_21 — General-purpose digital input/output pin.

I/O

1 FC3_SCK — Flexcomm 3: USART, SPI, or I2S clock.

2 R — Reserved.

3 R — Reserved.

O4 CTIMER3_MAT0 — 32-bit CTimer3 match output 0.

5 R — Reserved.

O6 TRACECLK — Trace clock.

7 R — Reserved.

I/O

8 SEC_PIO0_21 — Secure GPIO pin.

Table 4.

Pin description …continued

Symbol

Description

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