RT600 datasheet(24/167 Pages) NXP

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RT600

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Product data sheet

Rev. 2.0 — 1 April 2022

24 of 165

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

PIO0_25

Z I/O

0 PIO0_25 — General-purpose digital input/output pin.

I/O

1 FC3_RTS_SCL_SSEL1 — Flexcomm 3: USART

request-to-send, I2C clock, SPI slave select 1.

2 R — Reserved.

I3 FREQME_GPIO_CLK — Frequency Measure pin clock

input.

I4 CTIMER_INP6 — Capture input 6 to CTIMER input muxes.

I/O

5 FC2_SSEL3 — Flexcomm 2: SPI slave select 3.

O6 TRACEDATA[3] — Trace data bit 3.

I7 CLKIN — Clock input.

I/O

8 SEC_PIO0_25 — Secure GPIO pin.

PIO0_26/

CH3A

B16

Z I/O;

0 PIO0_26/CH3A — General-purpose digital input/output pin.

Analog input 3A. Can optionally be paired with CH3B for

differential input on ADC channel 3.

I/O

1 FC3_SSEL2 — Flexcomm 3: SPI slave select 2.

I2 SCT0_GPI6 — Pin input 6 to SCTimer/PWM.

O3 SCT0_OUT6 — SCTimer/PWM output 6.

I4 CTIMER_INP7 — Capture input 7 to CTIMER input muxes.

5 R — Reserved.

6 R — Reserved.

7 R — Reserved.

I/O

8 SEC_PIO0_26 — Secure GPIO pin.

PIO0_27/

CH3B

D13

Z I/O;

0 PIO0_27/CH3B — General-purpose digital input/output pin.

Analog input 3B. Can optionally be paired with CH3A for

differential input on ADC channel 3.

I/O

1 FC3_SSEL3 — Flexcomm 3: SPI slave select 3.

I2 SCT0_GPI7 — Pin input 7 to SCTimer/PWM.

O3 SCT0_OUT7 — SCTimer/PWM output 7.

O4 CTIMER0_MAT3 — 32-bit CTimer0 match output 3.

5 R — Reserved.

6 R — Reserved.

7 R — Reserved.

I/O

8 SEC_PIO0_27 — Secure GPIO pin.

Table 4.

Pin description …continued

Symbol

Description

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