RT600 datasheet(41/167 Pages) NXP

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RT600

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Product data sheet

Rev. 2.0 — 1 April 2022

41 of 165

NXP Semiconductors

RT600

Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4

Audio DSP CPUs

PIO3_20

Z I/O

0 PIO3_20 — General-purpose digital input/output pin.

O1 SD1_RESET_N — SD/MMC1 card hardware reset, active

low.

2 R — Reserved.

3 R — Reserved.

O4 CTIMER4_MAT2 — 32-bit CTimer4 match output 2.

PIO3_21

Z I/O

0 PIO3_21 — General-purpose digital input/output pin.

O1 SD1_VOLT — SD/MMC1 card regulator voltage control.

2 R — Reserved.

3 R — Reserved.

O4 CTIMER4_MAT3 — 32-bit CTimer4 match output 3.

5 R — Reserved.

O6 GPIO_INT_BMAT — Output of the pin interrupt pattern

match engine.

PIO3_22

Z I/O

0 PIO3_22 — General-purpose digital input/output pin.

1 R — Reserved.

2 R — Reserved.

3 R — Reserved.

4 R — Reserved.

I/O

5 FC5_RTS_SCL_SSEL1 — Flexcomm 5: USART

request-to-send, I2C clock, SPI slave select 1.

PIO3_23/

CH5A

H12

Z I/O

0 PIO3_23/CH5A — General-purpose digital input/output pin.

Analog input 5A. Can optionally be paired with CH5B for

differential input on ADC channel 5.

1 R — Reserved.

2 R — Reserved.

3 R — Reserved.

4 R — Reserved.

I/O

5 FC5_SSEL2 — Flexcomm 5: SPI slave select 2.

PIO3_24/

CH5B

E15

Z I/O

0 PIO3_24/CH5B — General-purpose digital input/output pin.

Analog input 5B. Can optionally be paired with CH5A for

differential input on ADC channel 5.

1 R — Reserved.

2 R — Reserved.

3 R — Reserved.

4 R — Reserved.

I/O

5 FC5_SSEL3 — Flexcomm 5: SPI slave select 3.

PIO3_25

Z I/O

0 PIO3_25 — General-purpose digital input/output pin.

I/O

1 FC6_SCK — Flexcomm 6: USART, SPI, or I2S clock.

Table 4.

Pin description …continued

Symbol

Description

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