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PCA2117DUGS/DA Datasheet(PDF) 37 Page - NXP Semiconductors |
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PCA2117DUGS/DA Datasheet(HTML) 37 Page - NXP Semiconductors |
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37 / 107 page ![]() PCA2117 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4 — 8 April 2015 37 of 107 NXP Semiconductors PCA2117 Automotive LCD driver for character displays 8.4 LCD voltage 8.4.1 VLCD pins The PCA2117 has 3 VLCD pins: VLCDIN — VLCD supply input VLCDOUT — VLCD voltage output VLCDSENSE — VLCD regulation circuitry input The VLCD voltage can be generated on-chip or externally supplied. 8.4.2 External VLCD supply When the external VLCD supply is selected, the VLCD voltage must be supplied to the pin VLCDIN. The pins VLCDOUT and VLCDSENSE can be left unconnected or alternatively connected to VLCDIN. The VLCD voltage is available at the row and column drives of the device through the chosen bias system. The internal charge pump must not be enabled, otherwise high internal currents may flow as well as high currents via pin VDD2 and pin VLCDOUT. No internal temperature compensation occurs on the externally supplied VLCD even if bit TCE is set logic 1 (see Section 8.1.4.1). Also programming VLCDA[8:0] and VLCDB[8:0] has no effect on the externally supplied VLCD. 8.4.3 Internal VLCD generation When the internal VLCD generation is selected, the VLCD voltage is available on pin VLCDOUT. The pins VLCDIN and VLCDSENSE must be connected to the pin VLCDOUT. The Charge_pump_ctrl command (see Table 30 on page 24) controls the charge pump. It can be enabled with the CPE bit. The multiplier setting can be configured with the CPC[1:0] bits. The charge pump can generate a VLCD up to 4 VDD2. 8.4.3.1 VLCD programming VLCD can be programmed by two bit-fields: VLCDA[8:0] and VLCDB[8:0]. VLCDA[8:0] is programmed with the voltage for the character mode and VLCDB[8:0] with the voltage for the icon mode. The final value of VLCD is a combination of the programmed VLCDA[8:0] respectively VLCDB[8:0] value and in addition the output of the temperature compensation block. The system is exemplified in Figure 18. |
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