PCA2117DUGSSLASHDA datasheet(66/107 Pages) NXP

66 / 107 page

PCA2117

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Product data sheet

Rev. 4 — 8 April 2015

66 of 107

NXP Semiconductors

PCA2117

Automotive LCD driver for character displays

A LOW-to-HIGH change of the data line while the clock is HIGH is defined as the STOP

condition (P).

The START and STOP conditions are shown in Figure 47.

9.2.3 System configuration

A device generating a message is a transmitter; a device receiving a message is the

receiver. The device that controls the message is the master; and the devices which are

controlled by the master are the slaves. The system configuration is shown in Figure 48.

9.2.4 Acknowledge

The number of data bytes transferred between the START and STOP conditions from

transmitter to receiver is unlimited. Each byte of 8 bits is followed by an acknowledge

cycle.

• A slave receiver which is addressed must generate an acknowledge after the

reception of each byte.

• Also a master receiver must generate an acknowledge after the reception of each

byte that has been clocked out of the slave transmitter.

• The device that acknowledges must pull-down the SDA line during the acknowledge

clock pulse, so that the SDA line is stable LOW during the HIGH period of the

acknowledge related clock pulse (set-up and hold times must be considered).

• A master receiver must signal an end of data to the transmitter by not generating an

acknowledge on the last byte that has been clocked out of the slave. In this event, the

transmitter must leave the data line HIGH to enable the master to generate a STOP

condition.

Acknowledgement on the I2C-bus is shown in Figure 49.

Fig 47. Definition of START and STOP conditions

Fig 48. System configuration

PCA2117DUGS/DA Datasheet(PDF) 66 Page - NXP Semiconductors