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PCA2117DUGS/DA Datasheet(PDF) 68 Page - NXP Semiconductors |
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PCA2117DUGS/DA Datasheet(HTML) 68 Page - NXP Semiconductors |
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68 / 107 page  PCA2117 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4 — 8 April 2015 68 of 107 NXP Semiconductors PCA2117 Automotive LCD driver for character displays 9.2.8 I2C-bus protocol The I2C-bus protocol is shown in Table 43. The sequence is initiated with a START condition (S) from the I2C-bus master which is followed by one of the two slave addresses available. All PCA2117 with the corresponding SA0 level acknowledge in parallel to the slave address, but all PCA2117 with the alternative SA0 level ignore the whole I2C-bus transfer. After acknowledgement, a control byte (see Section 9.1) follows which defines if the next byte is RAM or command information. The control byte also defines if the next byte is a control byte or further RAM or command data. In this way, it is possible to configure the device and then fill the display RAM with little overhead. The display bytes are stored in the display RAM at the address specified by the data pointer. Table 43. Example: Writing to RAM by I2C-bus Bits labeled as - are ignored. Commands and signals Values 1. Select RAM bank and set address pointer I2C-START S Slave address 0 1 1 1 0 1 SA0 R/W 0 Acknowledge from PCA2117 A CO 0 RS[1:0] 0 0 - - - - - Acknowledge from PCA2117 A Command: Sel_mem_bank 0 0 0 1 0 SMB[2:0] DDRAM 0 0 0 Acknowledge from PCA2117 A Command: Set_mem_addr 1 ADD[6:0] address 0h 0 0 0 0 0 0 0 Acknowledge from PCA2117 A 2. Select write RAM data I2C-RESTART Sr Slave address 0 1 1 1 0 1 SA0 R/W 0 Acknowledge from PCA2117 A CO 0 RS[1:0] 0 1 - - - - - Acknowledge from PCA2117 A Command: Write_data writing 0 to n byte Acknowledge from master after each byte A I2C-STOP P |
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