AD4685 datasheet(20/32 Pages) AD

Part #	AD4685

Description	1 MSPS/500 kSPS, 4-Channel, 16-Bit Dual, Simultaneous Sampling SAR ADCs

PDF	32 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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20 / 32 page

Data Sheet

AD4684/AD4685

MODES OF OPERATION

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Rev. 0 | 20 of 32

Oversampling in Sequencer Mode

While in sequencer mode, oversampling on the AINx0 and AINx1

channels can be performed in the AD4684/AD4685. There is a

two-cycle latency before the register update and start conversion

in oversampling mode and the AD4684/AD4685 automatically cycle

through AINx0 and AINx1. Figure 37 shows the timing diagram of the

rolling average oversampling in sequencer mode.

To perform oversampling in sequencer mode, write a nonzero

value to enable the OSR bits in the CONFIGURATION1 register

to select the number of samples to average. In addition, set the

OS_MODE bit to 1, while simultaneously setting the SEQ bit in the

CONFIGURATION1 register to 1.

Figure 37. Rolling Average Oversampling Sequencer Mode

AD4685 Datasheet(PDF) 20 Page - Analog Devices