Data Sheet

AD4684/AD4685

REGISTERS

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Rev. 0 | 29 of 32

Table 15. Bit Descriptions for CONFIGURATION1

Bits

Bit Name

Description

Reset

Access

[8:6]

OSR

Oversampling Ratio. Sets the oversampling ratio for all the ADCs in the rolling average mode. Rolling average

mode supports oversampling ratios of ×2, ×4, and ×8.

0x0

R/W

000: disabled.

001: ×2.

010: ×4.

011: ×8.

100: disabled.

101: disabled

110: disabled.

111: disabled.

5

CRC_W

CRC Write. Controls the CRC functionality for the SDI interface. When setting this bit from a 0 to a 1, the command

must be followed by a valid CRC to set this configuration bit. If a valid CRC is not received, the entire frame is

ignored. If the bit is set to 1, it requires a CRC to clear it to 0.

0x0

R/W

0: no CRC function.

1: CRC function.

4

CRC_R

CRC Read. Controls the CRC functionality for the SDOA and SDOB/ALERT interface.

0x0

R/W

0: no CRC function.

1: CRC function.

3

ALERT_EN

Enable Alert Indicator Function. This register functions when the SDO bit = 1. Otherwise, the ALERT_EN bit is

ignored.

0x0

R/W

0: SDOB.

1: ALERT.

2

RES

Resolution. Sets the size of the conversion result data. If OSR = 0, these bits are ignored and the resolution is set

to default resolution.

0x0

R/W

0: normal resolution.

1: 2-bit higher resolution.

1

REFSEL

Reference Select. Selects the ADC reference source.

0x0

R/W

0: selects internal reference.

1: selects external reference.

0

PMODE

Power-Down Mode. Sets the power modes.

0x0

R/W

0: normal mode.

1: power-down mode.

CONFIGURATION2 REGISTER

Address: 0x2, Reset: 0x0000, Name: CONFIGURATION2

Table 16. Bit Descriptions for CONFIGURATION2

Bits

Bit Name

Description

Reset

Access

[15:12]

ADDRESSING

Addressing. Bits[15:12] define the address of the relevant register. See the Addressing Registers section for further

details.

0x0

R/W

[11:9]

RESERVED

Reserved.

0x0

R