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AD4685 Datasheet(PDF) 21 Page - Analog Devices

Part # AD4685
Description  1 MSPS/500 kSPS, 4-Channel, 16-Bit Dual, Simultaneous Sampling SAR ADCs
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD4685 Datasheet(HTML) 21 Page - Analog Devices

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Data Sheet
AD4684/AD4685
MODES OF OPERATION
analog.com
Rev. 0 | 21 of 32
RESOLUTION BOOST
The default conversion result output data size for the AD4684/
AD4685 is 16 bits. When the on-chip oversampling function is
enabled, the performance of the ADC can exceed the 16-bit level.
To accommodate the performance boost, it is possible to enable an
additional two bits of resolution. If the RES bit in the CONFIGURA-
TION1 register is set to Logic 1, and the AD4684/AD4685 are in a
valid oversampling mode, the conversion result size is 18 bits for
the AD4684/AD4685. In this mode, 18 SCLK cycles are required to
propagate the data for the AD4684/AD4685. Figure 38 shows the
resolution boost diagram.
Figure 38. Resolution Boost
ALERT
The alert functionality is an out of range indicator and can
be used as an early indicator of an out of bounds con-
version result. An alert event triggers when the conversion
result value register exceeds the alert high limit value in
the ALERT_HIGH_THRESHOLD register, or falls below the
alert low limit value in the ALERT_LOW_THRESHOLD regis-
ter. The ALERT_HIGH_THRESHOLD register and the ALERT_
LOW_THRESHOLD register are common to all ADCs. Detailed
alert information is accessible in the Alert Register section. The
register contains two status bits per ADC, one corresponding to
the high limit and the other to the low limit. A logical OR of alert
signals for all ADCs creates a common alert value. This value
can be configured to drive out on the ALERT function of the SDOB/
ALERT pin. The SDOB/ALERT pin is configured as ALERT by
configuring the following bits in the CONFIGURATION1 register and
the CONFIGURATION2 register:
►
Set the SDO bit to 1.
►
Set the ALERT_EN bit to 1.
In addition, set a valid value to the ALERT_HIGH_THRESHOLD
register and the ALERT_LOW_THRESHOLD register.
The alert indication function is available in oversampling and in
nonoversampling modes.
The ALERT function of the SDOB/ALERT pin is updated at the end
of conversion. The alert indication status bits in the alert register
update as well and must be read before the end of the next
conversion. The ALERT function of the SDOB/ALERT pin is cleared
with a falling edge of CS. Issuing a software reset also clears the
alert status in the alert register.
Figure 39 shows the alert operation.
Figure 39. Alert Operation



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