AD74115H datasheet(39/113 Pages) AD

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Data Sheet

AD74115H

THEORY OF OPERATION

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Rev. 0 | 39 of 113

Short-Circuit Protection and Detection

The current from the AD74115H is limited by the programmable

DAC code.

In current input loop powered mode, the digital input comparator is

enabled by default to detect a short circuit.

The digital input comparator is enabled with a threshold voltage

of AVDD/2 and with the output inverted. During normal operation,

the voltage on I/OP is typically within 5 V of the VAVDD. If the

load is short circuited to ground, the voltage on the I/OP is pulled

to ground. When the voltage on the I/OP screw terminal falls to

less than the programmed threshold level, the comparator trips low,

setting the ANALOG_IO_SC bit in the ALERT_STATUS register.

Interpreting ADC Data

In current input loop, powered mode, the ADC, by default, meas-

ures the current flowing from the AD74115H into the I/OP screw

terminal through the RSENSE in a 25 mA range. Use the ADC meas-

urement result to calculate the current with the following equation:

IRSENSE= ADC_CODE

65,536 ×VoltageRange

RSENSE

where:

IRSENSEisthemeasuredcurrentinamps.

ADC_CODE is the value of the ADC_RESULT1 register.

Voltage Range is the full ADC span of the ADC range and is 2.5 V.

RSENSE is the sense resistor, which has a value of 100 Ω.

Current Input, Loop Powered with HART

Compatibility Mode

This mode is a HART-compatible version of the current input, loop

powered mode. However, the current source is not programmable;

therefore, configuring of the DACs is not needed. A current-limit

source of typically 30 mA is enabled when the current input, loop

powered with HART mode is selected.

The mode can provide resistive termination in current input, loop

powered mode. Input impedance is set to a minimum of 230 Ω to be

compliant with the HART receive impedance.

Resistance Measurement (2-Wire RTD)

The resistance measurement configuration biases an external 2-

wire RTD with a voltage derived from a 2.5 V bias. The resultant

excitation current flows through the 2 kΩ and 100 Ω resistors

(shown as RPULLUP in Figure 38). This configuration ensures an

accurate ratiometric measurement. The 16-bit, Σ-∆ ADC automat-

ically digitizes the voltage across the RTD. The low excitation

current ensures that the power dissipated by the RTD is minimized,

reducing self heating. See Figure 38 for an example of the RTD

bias circuit.

Figure 38. RTD Bias Circuit

It is essential that the AGND_SENSE pin connects to the low-side

of the measured RTD. Figure 39 shows the current, voltage, and

measurement paths of the resistance measurement configuration.

The resistance measurement mode can be used for 2-wire RTD

measurements, but also as a diagnostic of the attached load. Load

impedance can be used for load detection techniques or to help to

determine the health of the load over time.

Figure 39. Resistance Measurement Configuration

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