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AD74115H Datasheet(PDF) 6 Page - Analog Devices

Part # AD74115H
Description  Single-Channel, Software Configurable Input and Output with HART Modem
PDF  113 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD74115H Datasheet(HTML) 6 Page - Analog Devices

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Data Sheet
AD74115H
SPECIFICATIONS
analog.com
Rev. 0 | 6 of 113
CURRENT INPUT EXTERNALLY POWERED AND CURRENT INPUT EXTERNALLY POWERED WITH
HART
AVDD = +6 V to +28.8 V, AVSS = −2.5 V to −18 V, AGND = DGND = 0 V, REFIN = +2.5 V (ideal), DVCC = +2.7 V to +5.5 V, AVCC = +4.5
V to +5.5 V, and all specifications are at TA = −40°C to +105°C, unless otherwise noted. RSENSE = 100 Ω (Ideal), and CLOAD = 4.7 nF per the
recommended configuration.
Table 4. Current Input Externally Powered and Current Input Externally Powered with HART
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CURRENT INPUT
Input Resolution
16
Bits
Input Range
0
25
mA
Sensed across the external 100 Ω resistor
Screw Terminal Voltage
0
V
Short-Circuit Current Limit
25
35
mA
Nonprogrammable
ACCURACY
TUE1
−0.1
+0.1
% FSR
TUE at 25°C1
−0.05
+0.05
% FSR
INL
−4
±2
+4
LSB
Linearity specified from 0.1 mA to 25 mA
Offset Error
−4
+4
LSB
Offset Error at 25°C
−1.5
+1.5
LSB
Gain Error1
−250
+250
ppm FSR
Gain Error at 25°C1
−150
+150
ppm FSR
OTHER INPUT SPECIFICATIONS
DC PSRR2
In order
of noise
Input Impedance (Without HART Termination)
165
Ω
Current input, externally powered selected, including 100 Ω RSENSE
Input Impedance (with HART Resistive
Termination)
230
330
Ω
Current input, externally powered with HART selected, including
100 Ω RSENSE
Compliance (Without HART Termination)2
4.2
V
Current input, externally powered selected, and minimum voltage
required at the I/OP screw terminal to sink 25 mA
Compliance (with HART Resistive Termination)2
6.6
V
Current input, externally powered with HART selected, and
minimum voltage required at the I/OP screw terminal to sink 20
mA
1 RSENSE accuracy directly impacts the TUE and gain error.
2 Guaranteed by design and characterization.
CURRENT INPUT LOOP POWERED AND CURRENT INPUT LOOP POWERED WITH HART
AVDD = +6 V to +28.8 V, AVSS = −2.5 V to −18 V, AGND = DGND = 0 V, REFIN = +2.5 V (ideal), DVCC = +2.7 V to +5.5 V, AVCC = +4.5
V to +5.5 V, and all specifications are at TA = −40°C to +105°C, unless otherwise noted. RSENSE = 100 Ω (iIdeal), and CLOAD = 4.7 nF per the
recommended configuration. Note that the headroom specification for AVDD must be considered when setting supply voltages.
Table 5. Current Input Loop Powered and Current Input Loop Powered with HART
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CURRENT INPUTS
Input Resolution
16
Bits
Input Range
0
25
mA
Sensed across external 100 Ω resistor
Screw Terminal Voltage
AVDD
V
NonHART Current Limit
0
25
mA
Programmable current limit, 14-bit resolution
HART Mode Current Limit
23
30
mA
Current input, loop powered with HART enabled, nonprogrammable



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