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AD74115H Datasheet(PDF) 21 Page - Analog Devices |
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AD74115H Datasheet(HTML) 21 Page - Analog Devices |
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21 / 113 page  Data Sheet AD74115H PIN CONFIGURATION AND FUNCTION DESCRIPTIONS analog.com Rev. 0 | 21 of 113 Figure 4. Pin Configuration Table 20. Pin Function Description Pin No. Mnemonic Description 1 AGND Analog Ground. 2 REFOUT1 Internal 2.5 V Reference Output. The REFOUT pin must be connected to the REFIN pin to use the internal reference. 3 REFIN 2.5 V Reference Input. 4 HART_TX_IN AC-Coupled HART Transmit Signal. 5 HART_TX_OUT HART Transmit Signal. Couple this signal to the HART_TX_IN pin using the specified HART coupling capacitor listed in Table 36. 6 PPC_CTRL Single-Wire Interface Pin to Communicate with the ADP1034. The supply voltage rails from the ADP1034 are configured by SPI writes to the AD74115H and passed to the ADP1034 through this interface. 7 ACD_RDY Active Low, Open-Drain Output. This pin asserts when a new sequence of ADC conversion results is ready to be read. Connect this pin to a pull-up resistor to the DVDD pin. 8 RESET Hardware Reset Pin. Active low input. This pin resets the AD74115H to the power-on state. 9 ALERT Active Low, Open-Drain Output. This pin asserts low when an alert condition occurs. Read the ALERT_STATUS register when this pin is asserted. Connect this pin to the DVDD pin via a pull-up resistor. 10 SCLK Serial Interface Clock. 11 SDI Serial Interface Data In. 12 SDO Serial Interface Data Out. 13 SYNC Serial Interface Frame Synchronization Pin. Active low input. 14 DVCC1 Digital Supply. Decouple this pin with the recommended capacitor listed in Table 36. 15 CPUMP_P Charge Pump Fly Capacitor Terminal. If using the internal charge pump for unipolar operation, connect the recommended fly capacitor between the CPUMP_P pin and the CPUMP_N pin. Pins can be left disconnected if in bipolar mode. 16 DGND Digital Ground. 17 CPUMP_N Charge Pump Fly Capacitor Terminal. If using the internal charge pump for unipolar operation, connect the recommended fly capacitor between the CPUMP_P pin and the CPUMP_N pin. Leave these pins disconnected when in bipolar mode. 18 CP_OUT Charge Pump Output Voltage (Equal to Negative DVCC). When using the charge pump to generate the negative supply, connect the AVSS pin to the CP_OUT pin. 19 DLDO1V81 1.8 V Digital Low Dropout (LDO) Regulator Output. Decouple this pin with the recommended capacitor shown in Table 36. Do not use this pin externally. 20 GPIO_A General-Purpose Input and Output Pin A. This pin can monitor the digital input comparator result. 21 GPIO_B General-Purpose Input and Output Pin B. This pin can control the external digital output circuit. 22 GPIO_C General-Purpose Input and Output Pin C. This pin can control the internal digital output circuit. 23 GPIO_D General-Purpose Input and Output Pin D. 24 AGND_SENSE Analog Ground Sense. Tie this pin to the I/ON screw terminal. |
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