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CR14 Datasheet(PDF) 18 Page - STMicroelectronics |
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CR14 Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 46 page ![]() 4 CR14 I²C protocol description CR14 18/46 Figure 6. I²C Bus Protocol 4.5 I²C Memory Addressing To start up communication with the CR14, the bus master must initiate a START condition. Then, the bus master sends 8 bits (with the most significant bit first) on the Serial Data line, SDA. These bits consist of the Device Select Code (7 bits) plus a RW bit. According to the I²C bus definition, the seven most significant bits of the Device Select Code are the Device Type Identifier. For the CR14, these bits are defined as shown in Table 6. The 8th bit is the Read/Write bit (RW). It is set to ‘1’ for I²C Read, and to ‘0’ for I²C Write operations. If the data sent by the bus master matches the Device Select Code of a CR14 device, the corresponding device returns an acknowledgment on the SDA bus during the 9th bit time. The CR14 devices whose Device Select Codes do not correspond to the data sent, generate a No-ACK. They deselect themselves from the bus and go into stand-by mode. SCL SDA SCL SDA SDA START CONDITION SDA INPUT SDA CHANGE AI00792 STOP CONDITION 1 23 7 89 MSB ACK START CONDITION SCL 1 23 7 89 MSB ACK STOP CONDITION |
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