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CR14

4 CR14 I²C protocol description

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4.6

CR14 I²C Write Operations

The bus master sends a START condition, followed by a Device Select Code and the R/W bit

set to ’0’. The CR14 that corresponds to the Device Select Code, acknowledges and waits for

the bus master to send the Byte address of the register that is to be written to. After receipt of

the address, the CR14 returns another ACK, and waits for the bus master to send the data

Bytes that are to be written.

In the CR14 I²C Write mode, the bus master may sends one or more data Bytes depending on

the selected register.

The CR14 replies with an ACK after each data Byte received. The bus master terminates the

transfer by generating a STOP condition.

The STOP condition at the end of a Write access to the Input/Output Frame Register causes

the Radio Frequency data exchange between the CR14 and the PICC to be started.

During the Radio Frequency data exchange, the CR14 disconnects itself from the I²C bus. The

time (tRFEX) needed to complete the exchange is not fixed as it depends on the PICC command

format. To know when the exchange is complete, the bus master uses an ACK polling

sequence as shown in Figure 8. It consists of the following:

●

Initial condition: a Radio Frequency data exchange is in progress.

●

Step 1: the master issues a START condition followed by the first Byte of the new

instruction (Device Select Code plus R/W bit).

●

Step 2: if the CR14 is busy, no ACK is returned and the master goes back to Step 1. If the

CR14 has completed the Radio Frequency data exchange, it responds with an ACK,

indicating that it is ready to receive the second part of the next instruction (the first Byte of

this instruction being sent during Step 1).

Figure 7.

CR14 I²C Write Mode Sequence

AI12062

DATA N

ACK

CR14 WRITE

DEV SEL

BYTE ADDR

DATA 1

DATA 2

DATA 3

ACK

R/W

BUS Master

BUS Slave

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