MAX2 datasheet(97/297 Pages) ALTERA

97 / 297 page

Chapter 5: DC and Switching Characteristics

5–25

Timing Model and Specifications

Altera Corporation

MAX II Device Handbook

JTAG Timing Specifications

Figure 5–6 shows the timing waveforms for the JTAG signals.

Table 5–34 shows the JTAG Timing parameters and values for MAX II devices.

Table 5–33. MAX II Maximum Output Clock Rate for I/O

I/O Standard

MAX II / MAX IIG

MAX IIZ

–3 Speed

Grade

–4 Speed

Grade

–5 Speed

Grade

–6 Speed

Grade

–7 Speed

Grade

–8 Speed

Grade

3.3-V LVTTL

304

MHz

3.3-V LVCMOS

304

MHz

2.5-V LVTTL

220

MHz

2.5-V LVCMOS

220

MHz

1.8-V LVTTL

200

MHz

1.8-V LVCMOS

200

MHz

1.5-V LVCMOS

150

MHz

3.3-V PCI

304

MHz

Figure 5–6. MAX II JTAG Timing Waveforms

TDI

TMS

TDO

TCK

Signal

to be

Captured

Signal

to be

Driven

tJCP

tJCH

tJCL

tJPSU

tJPH

tJPCO

tJPXZ

tJPZX

tJSSU

tJSH

tJSZX

tJSCO

tJSXZ

Table 5–34. MAX II JTAG Timing Parameters (Part 1 of 2)

Symbol

Parameter

Min

Max

Unit

JC P (1)

TCK

clock period for V

CCIO1 =3.3 V

55.5

—

TCK

clock period for V

CCIO1 =2.5 V

62.5

—

TCK

clock period for V

CCIO1 =1.8 V

100

—

TCK

clock period for V

CCIO1 =1.5 V

143

—

JC H

TCK

clock high time

—

JC L

TCK

clock low time

—

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