XRT83SL216 datasheet(32/41 Pages) EXAR

32 / 41 page

XRT83SL216

PRELIMINARY

16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT

REV. P1.0.3

JABW

JA Band width Select

This bit is used to select the band with of the JA PLL.

"0" = 10 Hz "1" = 1.5Hz

NOTE: If a "1" is written into this bit, JA FIFO size of 64 bit wide is

automatically selected.

R/W

JASEL1

JASEL0

Jitter Attenuator Select

These bits are used to configure the Jitter Attenuator into the

Receive or Transmit path.

"00" = Disabled

"01" = Transmit Path

"10" = Receive Path

"11" = Disabled

R/W

TABLE 7: MICROPROCESSOR REGISTERS 0X01H &0X02H BIT DESCRIPTION

INTERRUPT STATUS REGISTERS (0X01H) & 0X02H

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

INTS_n

Interrupt Status

These 2 registers are ready only to determine when an interrupt

event occurs, the channel that generates interrupt can be identified

with minimum read/write operation.

TABLE 6: MICROPROCESSOR REGISTER 0X00H BIT DESCRIPTION

GLOBAL CONTROL REGISTER FOR ALL 16 CHANNELS (0X00H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

XRT83SL216 Datasheet(PDF) 32 Page - Exar Corporation

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