XRT83SL216 datasheet(33/41 Pages) EXAR

33 / 41 page

PRELIMINARY

XRT83SL216

REV. P1.0.3

16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT

TABLE 8: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION

TABLE 9: MICROPROCESSOR REGISTERS 0X04H & 0X05H BIT DESCRIPTION

REVISION "ID" REGISTER (0X03H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

Revision

"ID"

The revision "ID" of the XRT83SL216 LIU is used to enable soft-

ware to identify which revision of silicon is currently being tested.

The revision "ID" for the first revision of silicon (Revision A) will be

0x01h.

DEVICE "ID" REGISTERS (0X04H & 0X05H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

Device "ID" The device for this chip consists of 2 read only registers. The ID for

the XR T83SL216 is 0x8004h.

TABLE 10: MICROPROCESSOR REGISTER BIT DESCRIPTION

CHANNEL CONTROL REGISTER (CHANNEL_n, where n = 0:15)

(0X06H, 0X09H, 0X0CH, 0X0FH, 0X12H, 0X15H, 0X18H, 0X1BH, 1EH, 0X21H, 0X24H, 0X27H, 0X2AH, 0X2DH, 0X30H, 0X33H)

BIT

NAME

FUNCTION

Type

Default

Value

(HW reset)

SRES_n

Software Reset

Writing a "1" to this bit will cause the channel register to reset to

it's default value.

NOTE: This is a Write-Only bit.

ARAOS_n

Automatic Receive All Ones

If ARAOS_n is selected, an all ones pattern will be sent to the

RPOS/RNEG outputs if the channel experiences an RLOS condi-

tion. If RLOS does not occur, ARAOS_n will remain inactive.

"0" = Disabled

"1" = Enabled

R/W

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