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Data Sheet

LTC4296-1

THEORY OF OPERATION

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Rev. 0 | 17 of 46

OVERVIEW

The LTC4296-1 is an IEEE 802.3cg-compliant, SPoE, PSE control-

ler that controls and monitors power delivery for up to five PDs. The

complementary data protocol for SPoE is 10BASE-T1L.

With a host microcontroller, the LTC4296-1 provides the circuitry

required to implement an IEEE 802.3cg-compliant PSE design. Ad-

ditional required components include a per port external, N-channel

MOSFET and a sense resistor to implement high-side electronic

circuit breakers with foldback ACL. An optional low-side, N-channel

MOSFET, combined with per port, low-side sense resistors can

be used to implement a low-side electronic circuit breaker. The

LTC4296-1 application circuit provides the fault tolerance mandated

by IEEE 802.3cg, increases system reliability, and minimizes power

losses compared to designs with on-board MOSFETs.

The source and return circuit breakers offer protection against the

following output faults at the connector:

►

A short between the two conductors

►

A short on one conductor or both conductors to an external

positive voltage

►

A short on the positive conductor to ground

The host microcontroller is used to configure the LTC4296-1 for PD

classification by writing to the configuration registers using the SPI.

The host microcontroller can also communicate with the LTC4296-1

via the SPI to read telemetry, such as port status, port voltages,

and currents. The data integrity of the SPI is verified with the PEC

feature.

SPoE

SPoE is a standard protocol for sending power over 2-wire Ethernet

data cables. SPoE is similar in concept to traditional power over

Ethernet (PoE) but differs significantly in definition and implementa-

tion. The differences stem mainly from the unique power coupling

techniques used in a 2-wire circuit, as opposed to 4-wire and

8-wire, pair-oriented powering techniques of PoE. SPoE enables

the simultaneous transmission of power and data over a single

conductor pair, for example, balanced twisted pair or coaxial cable

(Figure 44).

Single pair Ethernet (SPE) data connections consist of a single pair

of wires, AC-coupled at each end to avoid ground loops. Unlike

PoE systems that transmit power common mode to the data, SPoE

systems, diplex power and data over a single pair of conductors.

IEEE 802.3cg (SPoE) is an extension of 802.3bu power over data

lines (PoDL). The IEEE Standards Association ratified PoDL in

2016. Multiple complementary data standards are already ratified

or in development, ranging from 10 Mbps to 10 Gbps and higher.

PoDL defines protocols for detecting, classifying, powering, discon-

necting, and standby power operation. IEEE 802.3cg was ratified

in 2019 to add features targeting long reach protocols, such as

10BASE-T1L, with cable lengths of up to 1 km.

SPoE was tailored to meet building and factory automation market

requirements. SPoE also defines the classification-based power

delivery protocol for the PSE and PD. Classification ensures PSE

and PD compatibility and avoids applying power into a short-circuit

or an open-circuit. The PSE performs detection, followed by classifi-

cation, of the PD before applying the full operating voltage. During

classification, the PSE requests information such as class, type,

and cable resistance measurement (CRM) support from the PD.

If the PSE determines that the PD is compatible, it applies the

full operating voltage to the PD at the medium dependent inter-

face/power interface (MDI/PI). If CRM is supported, the PSE and

PD can negotiate allocation of surplus power to the PD. The PSE

can skip classification and power up a PD that provides a valid

detection signature. A PD providing an invalid detection signature,

however, must undergo classification before being powered. A PD

is required to present a valid MFVS to remain fully powered. If

the PD is disconnected or goes to sleep, the PSE detects the

absence of the MFVS and removes the full operating voltage. The

PSE removes the output voltage entirely in the event of a fault or

short-circuit.

After removing the full operating voltage in the absence of the

MFVS, the PSE enters a low power sleep state and provides

VSLEEP (3.4 V typical) at the port.

Wake-up functions from sleep are flexible and can flow either

upstream (PD initiated) or downstream (PSE initiated). The PD can

request restoration of the full operating voltage by presenting a

wake-up current signature to the PSE. The PSE can also initiate

a wake-up of the PD by providing the full operating voltage after

successful classification.

Figure 44. Basic SPoE Architecture

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