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F0502 Datasheet(PDF) 6 Page - Renesas Technology Corp |
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F0502 Datasheet(HTML) 6 Page - Renesas Technology Corp |
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6 / 39 page ![]() Sampling IF Receiver 600MHz to 1000MHz F0502 Datasheet FlatNoiseTM, Zero-DistortionTM, SIF Rx 6 February 8,2022 F0502 SPECIFICATION F0502 Typical Application Circuit, when operated as a Sampling IF Receiver, VCC = +5.00V, TC = +25°C, FRF = 850MHz, FIF = 184MHz, FLO = 1034MHz, PLO = 0 dBm, Max gain setting, IF output power = +3dBm per tone, TDD_ = LOW, STD Mode, unless otherwise stated. EVkit PCB, connector and IF transformer losses are de-embedded unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units Logic Input High VIH For all control pins 1.07 V Logic Input Low VIL For all control pins 0.68 V Logic Current IIH, IIL For all control pins -150 10 μA Total Supply Current Icc STD Mode 480 5451 mA LC Mode 390 440 Standby Mode STBY = VIH 26 36 Conversion Power Gain G STD Mode 26.2 28.2 30.2 dB LC Mode 26.2 28.2 30.2 STD Mode Max attenuation -18.8 Gain Control Range GRANGE 47 dB Step Size GSTEP 1 dB Differential Gain Error DNL Between any two adjacent 1dB steps 0.1 0.2 2 dB Integral Gain Error INL Error vs. line (G27 Ref) 0.2 0.8 dB Phase Error IPE Maximum phase change between GMAX and any state down to G-14 2 deg Noise Figure NF STD Mode 9.6 10.6 dB STD Mode at GMAX – 10dB 9.6 10.6 LC Mode 9.3 10.3 LC Mode at GMAX – 10dB 9.3 10.3 Noise Figure with Blocker NFBLK Desired RF = 800MHz Blocker = 700MHz LO = 984MHz PIN = +4dBm Gain = -1dB 17.5 19 dB |
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