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QL3025 Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part # QL3025
Description  25,000 Usable PLD Gate pASIC 3 FPGA Combining High Performance and High Density
PDF  17 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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QL3025 Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers

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© 2002 QuickLogic Corporation
www.quicklogic.com
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QL3025 pASIC 3 FPGA Data Sheet Rev E
Figure 2: Loads used for t
PXZ
Table 5: Output-Only I/O Cells
Symbol
Parameter
Propagation Delays (ns) Output Load
Capacitance (pF)
30
50
75
100
150
tOUTLH
Output Delay Low to High
2.1
2.5
3.1
3.6
4.7
tOUTHL
Output Delay High to Low
2.2
2.6
3.2
3.7
4.8
t
PZH
Output Delay Tri-state to High
1.2
1.7
2.2
2.8
3.9
tPZL
Output Delay Tri-state to Low
1.6
2.0
2.6
3.1
4.2
tPHZ
Output Delay High to Tri-State a
a. The following loads presented in
Figure 2 are used for t
PXZ:
2.0
-
-
-
-
t
PLZ
Output Delay Low to Tri-State
1.2
-
-
-
-
1ΚΩ
1ΚΩ
tPHZ
tPLZ
5 pF
5 pF



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