ADF4368 datasheet(49/54 Pages) AD

49 / 54 page

Data Sheet

ADF4368

analog.com

Rev. 0 | 49 of 54

Figure 106.

Table 75. Bit Descriptions for REG0040

Bits

Bit Name

Description

Reset

Access

[7:6]

REG40_RSV1

Reserved.

0x0

R/W

[5:3]

MUTE_CLKOUT2

Mute Control for the Output Buffer 2.

0x0

R/W

[2:0]

MUTE_CLKOUT1

Mute Control for the Output Buffer 1.

0x0

R/W

Address: 0x43, Reset: 0x00, Name: REG0043

Figure 107.

Table 76. Bit Descriptions for REG0043

Bits

Bit Name

Description

Reset

Access

REG43_RSV5

Reserved.

0x0

R/W

ADC_CLK_SEL

Select ADC Clock Source.

0x0

R/W

0: Use Rclk as ADC Clock Source (normal Operation).

1: Use SPI SCLK as ADC Clock Source (test Mode).

REG43_RSV4

Reserved.

0x0

R/W

REG43_RSV3

Reserved.

0x0

R/W

REG43_RSV2

Reserved.

0x0

R/W

[2:0]

REG43_RSV1

Reserved.

0x0

R/W

Address: 0x4E, Reset: 0x00, Name: REG004E

Figure 108.

Table 77. Bit Descriptions for REG004E

Bits

Bit Name

Description

Reset

Access

[7:6]

REG4E_RSV2

Reserved.

0x0

R/W

[5:4]

DCLK_DIV1

Controls Div_Rclk Div1 Div_Nclk Div1.

0x0

R/W

ADF4368 Datasheet(PDF) 49 Page - Analog Devices

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