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CV128 Datasheet(PDF) 2 Page - Renesas Technology Corp |
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CV128 Datasheet(HTML) 2 Page - Renesas Technology Corp |
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2 / 13 page ![]() COMMERCIALTEMPERATURERANGE 2 IDTCV128 1-TO-12DIFFERENTIALCLOCKBUFFER PIN CONFIGURATION Symbol Description Min. Max. Unit VDDA 3.3V Core Supply Voltage 4.6 V VDD 3.3V Logic Input Supply Voltage GND - 0.5 4.6 V TSTG Storage Temperature –65 +150 °C TAMBIENT Ambient Operating Temperature 0 +70 °C TCASE Case Temperature +115 °C ESD Prot Input ESD Protection 2000 V Human Body Model ABSOLUTE MAXIMUM RATINGS(1) NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. SSOP/ TSSOP TOP VIEW 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 VDDA VSSA IREF OE_10_11# DIF_11 DIF_11# VDD DIF_6 DIF_6# OE_9# VSS VDD HIGH_BW# SA_2/PLL/BYPASS# SCL 25 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 CLK_IN CLK_IN# DIF_0 DIF_0# VSS VDD DIF_1 DIF_1# DIF_2# VSS VDD DIF_2 SA_1 SDA VSS SA_0 OE_0# OE_1# DIF_3 DIF_3# OE_2# DIF_4 DIF_4# OE_3# OE_4# DIF_5 DIF_5# OE_5# 56 55 54 53 52 51 50 49 DIF_10 DIF_10# FS_A VTT_PWRGD#/PWRDWN DIF_9 DIF_9# OE_8# DIF_8 DIF_8# DIF_7 DIF_7# OE_7# OE_6# OE FUNCTIONALITY OE# - Pin OE# - SMBus bit DIF DIFF]# 0 1 Normal Normal 0 0 Tristate Tristate 1 1 Tristate Tristate 1 0 Tristate Tristate |
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