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Feb.27.20

Features

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128K x 8 advanced high-speed CMOS static RAM

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JEDEC revolutionary pinout (center power/GND) for

reduced noise.

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Equal access and cycle times

– Commercial:12/15/20ns

– Industrial:15/20ns

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One Chip Select plus one Output Enable pin

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Bidirectional inputs and outputs directly TTL-compatible

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Low power consumption via chip deselect

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Available in a 32-pin 400 mil Plastic SOJ.

Functional Block Diagram

Description

TheIDT71124isa1,048,576-bithigh-speedstaticRAMorganizedas

128Kx8.Itisfabricatedusinghigh-performance,high-reliabilityCMOS

technology.Thisstate-of-the-arttechnology,combinedwithinnovative

circuitdesigntechniques,providesa cost-effectivesolutionforhigh-speed

memory needs. The JEDEC centerpower/GND pinout reduces noise

generationandimprovessystemperformance.

TheIDT71124hasanoutputenablepinwhichoperatesasfastas6ns,

withaddressaccesstimesasfastas12nsavailable.Allbidirectionalinputs

and outputs of the IDT71124 are TTL-compatible and operation is from

asingle5Vsupply.Fullystaticasynchronouscircuitryisused;noclocks

or refreshes are required for operation.

The IDT71124 is packaged in a 32-pin 400 mil Plastic SOJ.

ADDRESS

DECODER

1,048,576-BIT

MEMORY ARRAY

I/O CONTROL

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A0

A16

3514 drw 01

8

8

I/O0 -I/O7

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8

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CONTROL

LOGIC

WE

OE

CS

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CMOS Static RAM

1 Meg (128K x 8-Bit)

Revolutionary Pinout

71124