DA7218 datasheet(65/198 Pages) RENESAS

65 / 198 page

DA7218

Ultra-Low Power Stereo Codec

Datasheet

Revision 3.4

24-Dec-2021

CFR0011-120-00

65 of 197

SCL

SDA

Figure 26: Timing of I2C START and STOP Conditions

The I2C bus is monitored by DA7218 for a valid SLAVE address whenever the interface is enabled. It

responds with an Acknowledge immediately when it receives its own slave address. The

Acknowledge is achieved by pulling the SDA line LOW during the following clock cycle (white blocks

marked with ‘A’ in Figure 27 to Figure 30).

The protocol for a register write from master to slave consists of a start condition, a slave address

with read/write bit and the 8-bit register address followed by eight bits of data terminated by a STOP

condition (the DA7218 responds to all bytes with an Acknowledge).This is illustrated in Figure 27.

SLAVE addr

REG addr

DATA

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Master to Slave

Slave to Master

7-bits

1-bit

8-bits

Figure 27: I2C Byte Write (SDA signal)

When the host reads data from a register it first has to write access DA7218 with the target register

address and then read access DA7218 with a repeated START, or alternatively a second START

condition. After receiving the data the host sends a Not Acknowledge (NAK) and terminates the

transmission with a STOP condition:

S SLAVEaddr W

REG addr

SLAVEaddr

S = START condition

A = Acknowledge (low)

Sr = Repeated START condition

* = Not Acknowledge (NAK)

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

7-bits

1-bit

8-bits

7-bits

DATA

1-bit

8-bits

SLAVEaddr

7-bits

DATA

1-bit

8-bits

Slave to Master

S SLAVEaddr W

REG addr

7-bits

1-bit

8-bits

Figure 28: Examples of the I2C Byte Read (SDA line)

Consecutive (Page mode) Read-out mode (cif_i2c_write_mode = 0) is initiated from the master by

sending an Acknowledge instead of Not Acknowledge (NAK) after receipt of the data word. The I2C

control block then increments the address pointer to the next I2C address and sends the data to the

master. This enables an unlimited read of data bytes until the master sends a NAK directly after the

receipt of data, followed by a subsequent STOP condition. If a non-existent I2C address is read out,

the DA7218 will return code zero.

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