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DA7218 Datasheet(PDF) 90 Page - Renesas Technology Corp |
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DA7218 Datasheet(HTML) 90 Page - Renesas Technology Corp |
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90 / 198 page ![]() DA7218 Ultra-Low Power Stereo Codec Datasheet Revision 3.4 24-Dec-2021 CFR0011-120-00 90 of 197 © 2021 Renesas Electronics Table 92: GAIN_RAMP_CTRL (Page 0: 0x0000000D) Bit Mode Symbol Description Reset 1:0 R/W gain_ramp_rate Controls the speed of the gain ramping when gain_ramping is activate (nominal rate = 0.88 ms/dB) 0 = nominal rate * 8 (fastest) 1 = nominal rate 2 = nominal rate / 8 3 = nominal rate / 16 (slowest) 0x0 Table 93: CIF_TIMEOUT_CTRL (Page 0: 0x00000010) Bit Mode Symbol Description Reset 0 R/W i2c_timeout_en I2C timeout to release SCL if read/write access to the chip does not complete correctly 0 = No timeout (SCL will be held low by the chip) 1 = Timeout will occur after approximately 40 ms 0x1 |
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