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ADF7021 Datasheet(PDF) 44 Page - Analog Devices |
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ADF7021 Datasheet(HTML) 44 Page - Analog Devices |
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44 / 44 page ![]() ADF7021 Preliminary Technical Data Rev. PrI | Page 44 of 44 ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05876-0-9/06(PrI) OUTLINE DIMENSIONS PIN 1 INDICATOR TOP VIEW 6.75 BSC SQ 7.00 BSC SQ 1 48 12 13 37 36 24 25 4.25 4.10 SQ 3.95 0.50 0.40 0.30 0.30 0.23 0.18 0.50 BSC 12° MAX 0.20 REF 0.80 MAX 0.65 TYP 1.00 0.85 0.80 5.50 REF 0.05 MAX 0.02 NOM 0.60 MAX 0.60 MAX PIN 1 INDICATOR COPLANARITY 0.08 SEATING PLANE 0.25 MIN EXPOSED PAD (BOTTOM VIEW) COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2 Figure 48. 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 7 × 7 mm Body, Very Thin Quad (CP-48-3) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option ADF7021BCPZ1 −40°C to +85°C 48-Lead Lead Frame Chip Scale Package [LFCSP_VQ] CP-48-3 EVAL-ADF70XXMB Control Mother Board EVAL-ADF70XXMB2 Evaluation Platform EVAL-ADF7021DB2 860 MHz to 870 MHz Daughter Board EVAL-ADF7021DB3 431 MHz to 470 MHz Daughter Board 1 Z = Pb-free part. |
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