MOTOROLA

MPC505

4

MPC505ADI/D

CENTRAL PROCESSING UNIT

The RISC MCU processor (RCPU) integrates four execution units: an integer unit (IU), a load/store

unit (LSU), a branch processing unit (BPU), and a floating-point unit (FPU). The use of simple in-

structions with rapid execution times yields high efficiency and throughput for MPC505-based sys-

tems.

Most fixed-point instructions execute in one clock cycle. The FPU is designed to provide cost-effec-

tive solutions to most mathematical problems. It includes single- and double-precision multiply-add

instructions. Instructions can complete out of order for increased performance; however, the pro-

cessor makes execution appear sequential.

Major features of the RCPU are as follows:

• High-performance microprocessor

— Single clock-cycle execution for many instructions

• Four independent execution units and two register files

— Independent load/store unit for load and store operations

— Branch-processing unit featuring static branch prediction

— A 32-bit integer unit

— Fully IEEE 754-compliant floating-point unit for both single- and double-precision opera-

tions

— Thirty-two general-purpose registers (GPRs) for integer operands

— Thirty-two floating-point registers (FPRs) for single- or double-precision operands

• Facilities for enhanced system performance

— Programmable big- and little-endian byte ordering

— Atomic memory references

• In-system testability and debugging features through boundary-scan capability

• High instruction and data throughput

— Condition register (CR) look-ahead operations performed by BPU

— Branch-folding capability during execution (zero-cycle branch execution time)

— Programmable static branch prediction on unresolved conditional branches

— A prefetch queue that can hold up to four instructions, providing look-ahead capability

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com