MPC505

MOTOROLA

MPC505ADI/D

7

System Protection

The system protection unit within the SIU consists of a reset status register, two interrupt timers,

and a bus monitor. System protection features include the following:

• The bus monitor monitors internal-to-external bus accesses. Four selectable response time

periods are available, ranging from 16 to 256 system clock cycles. An internal bus error signal

is generated if a bus time-out occurs.

• The reset status register distinguishes between all of the possible reset causes.

• A 32-bit decrementer (DEC) and a 16-bit periodic interrupt timer (PIT) generate interrupts. The

DEC time period can range from 250 ns to 1073.74 seconds with a 4-MHz source. The PIT

time period can range from 1 s to 65.5 ms with a 4-MHz source.

• A software watchdog prevents system lock-up in case the software becomes trapped in loops

with no controlled exit. The software watchdog has a selectable time-out range based on the

system clock frequency (167 ns to 2.79 s with a 24-MHz system clock). A reset can be gen-

erated if a software watchdog time-out occurs.

Reset

Reset procedures handle system initialization and recovery from catastrophic failure. The MPC505

performs reset with a combination of hardware and software. The SIU determines whether a reset

is valid, asserts control signals, performs basic system configuration based on hardware mode-se-

lect inputs, and then passes control to the CPU, which performs software initialization.

The following sources can cause reset in the MPC505:

• External reset pin (RESET)

• Loss of Clock

• Loss of PLL lock

• Software watchdog reset

• Checkstop reset

• JTAG reset

General-Purpose I/O

External bus interface pins can be used for more than one function. When not used for bus interface

signals, these pins can be used as digital I/O pins.

SIU digital I/O pins are grouped into 8-bit ports. The following registers are associated with each

I/O port. (Output-only ports do not have a data direction register.)

• Pin assignment register — allows the user to configure a pin for its primary function or digital

I/O.

• Data direction register — configures individual pins as input or output pins.

• Data register — allows writes to output pins and reads of input pins

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com