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ADV7393 Datasheet(PDF) 84 Page - Analog Devices

Part # ADV7393
Description  Low Power, Chip Scale 10-Bit SD/HD Video Encoder
PDF  96 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7393 Datasheet(HTML) 84 Page - Analog Devices

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ADV7390/ADV7391/ADV7392/ADV7393
Rev. 0 | Page 84 of 96
APPENDIX 9–CONFIGURATION SCRIPTS
The scripts listed in the following pages can be used to configure the ADV739x for basic operation. Certain features are enabled by
default. If required for a specific application, further features can be enabled. Table 58 lists the scripts available for SD modes of operation.
Similarly, Table 89 and Table 106 list the scripts available for ED and HD modes of operation, respectively.
STANDARD DEFINITION
Table 58. SD Configuration Scripts
Input Format
Input Data Width
Synchronization Format
Input Color Space
Output Color Space
Table Number
525i (NTSC)
8-Bit SDR
EAV/SAV
YCrCb
YPrPb
Table 59
525i (NTSC)
8-Bit SDR
EAV/SAV
YCrCb
CVBS/Y-C (S-Video)
Table 60
525i (NTSC)
8-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 61
525i (NTSC)
8-Bit SDR
EAV/SAV
YCrCb
RGB
Table 62
525i (NTSC)
8-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 63
525i (NTSC)
10-Bit SDR
EAV/SAV
YCrCb
YPrPb
Table 64
525i (NTSC)
10-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 65
525i (NTSC)
10-Bit SDR
HSYNC/VSYNC
YCrCb
CVBS/ Y-C (S-Video)
Table 66
525i (NTSC)
10-Bit SDR
EAV/SAV
YCrCb
RGB
Table 67
525i (NTSC)
10-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 68
525i (NTSC)
16-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 69
525i (NTSC)
16-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 70
525i (NTSC)
16-Bit SDR
HSYNC/VSYNC
RGB
YPrPb
Table 71
525i (NTSC)
16-Bit SDR
HSYNC/VSYNC
RGB
CVBS/ Y-C (S-Video)
Table 72
525i (NTSC)
16-Bit SDR
HSYNC/VSYNC
RGB
RGB
Table 73
625i (PAL)
8-Bit SDR
EAV/SAV
YCrCb
YPrPb
Table 74
625i (PAL)
8-Bit SDR
EAV/SAV
YCrCb
CVBS/Y-C (S-Video)
Table 75
625i (PAL)
8-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 76
625i (PAL)
8-Bit SDR
EAV/SAV
YCrCb
RGB
Table 77
625i (PAL)
8-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 78
625i (PAL)
10-Bit SDR
EAV/SAV
YCrCb
YPrPb
Table 79
625i (PAL)
10-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 80
625i (PAL)
10-Bit SDR
HSYNC/VSYNC
YCrCb
CVBS/Y-C (S-Video)
Table 81
625i (PAL)
10-Bit SDR
EAV/SAV
YCrCb
RGB
Table 82
625i (PAL)
10-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 83
625i (PAL)
16-Bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
Table 84
625i (PAL)
16-Bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 85
625i (PAL)
16-Bit SDR
HSYNC/VSYNC
RGB
YPrPb
Table 86
625i (PAL)
16-Bit SDR
HSYNC/VSYNC
RGB
CVBS/Y-C (S-Video)
Table 87
625i (PAL)
16-Bit SDR
HSYNC/VSYNC
RGB
RGB
Table 88
Table 59. 8-Bit 525i YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. YPrPb out. SSAF PrPb
filter enabled. Active video edge
control enabled. Pedestal enabled.
Table 60. 8-Bit 525i YCrCb In (EAV/SAV), CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xCB
Pixel data valid. CVBS/S-Video out.
SSAF PrPb filter enabled. Active video
edge control enabled. Pedestal enabled.



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