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ST7789V2 Datasheet(PDF) 227 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 Datasheet(HTML) 227 Page - Sitronix Technology Co., Ltd. |
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227 / 319 page  ST7789V2 Version 1.0 Page 227 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. 9.1.33 WRMEMC (3Ch): Write Memory Continue 3CH WRMEMC (Write Memory Continue) Inst / Para D/CX WRX RDX D17-8 D7 D6 D5 D4 D3 D2 D1 D0 HEX WRMEMC 0 ↑ 1 - 0 0 1 1 1 1 0 0 (3Ch) 1ST parameter 1 ↑ 1 D1[17]-D1[8] D1[7] D1[6] D1[5] D1[4] D1[3] D1[2] D1[1] D1[0] 1 ↑ 1 Dx[17]-Dx[8] Dx[7] Dx[6] Dx[5] Dx[4] Dx[3] Dx[2] Dx[1] Dx[0] Nth parameter 1 ↑ 1 Dn[17]-Dn[8] Dn[7] Dn[6] Dn[5] Dn[4] Dn[3] Dn[2] Dn[1] Dn[0] Description -This command transfers image data from the host processor to the display module’s frame memory continuing from the pixel location following the previous write memory continue or memory write command. -If MV=0: Data is written continuing from the pixel location after the write range of the previous memory write or write memory continue. The column register is then incremented and pixels are written to the frame memory until the column register equals the end column (XE) value. The column register is then reset to XS and the page register is incremented. Pixels are written to the frame memory until the page register equals the end page (YE) value and the column register equals the XE value, or the host processor sends another command. If the number of pixels exceeds (XE-XS+1)*(YE-YS+1) the extra pixels are ignored. If MV=1: Data is written continuing from the pixel location after the write range of the previous memory write or write memory continue. The page register is then incremented and pixels are written to the frame memory until the page register equals the end page (YE) value. The page register is then reset to YS and the column register is incremented. Pixels are written to the frame memory until the column register equals the end column (XE) value and the page register equals the YE value, or the host processor sends another command. If the number of pixels exceeds (XE-XS+1)*(YE-YS+1) the extra pixels are ignored. Restriction A memory write should follow a column address set or page address set to define the write address. Otherwise, data written with write memory continue is written to undefined addresses. Register availability Status Availability Normal Mode On, Idle Mode Off, Sleep Out Yes Normal Mode On, Idle Mode On, Sleep Out Yes Partial Mode On, Idle Mode Off, Sleep Out Yes Partial Mode On, Idle Mode On, Sleep Out Yes Sleep In Yes |
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