PS2500 2.2 GHz Fractional-N Frequency Synthesizer
- 22 -
Philsar Semiconductor Inc.
146 Colonnade Road S.
Nepean, Ontario, Canada
K2E 7Y1
Tel: 613-274-0922
Fax: 613-274-0915
www.philsar.com
PMP-001-DS2 V1.2
General Synthesizer Registers
Figure 9: Hex5 Reference Frequency Dividers Register (Write only)
This register configures the dual-programmable reference frequency dividers for the main and auxiliary
synthesizers.
The dual-programmable reference frequency dividers provide the reference frequencies to the phase
detectors by dividing the crystal oscillator frequency. The lower five bits hold the reference frequency
divide index for the main phase detector. The next five bits hold the reference frequency divide index for
the auxiliary phase detector. Divide ratios from 1 to 32 are possible for each reference frequency divider.
Values to be loaded are:
• Main Reference Frequency Divider Index = Desired main oscillator frequency division ratio - 1. Default
value on power up is 0, signifying that the reference frequency is not divided for the main phase detector.
• Auxiliary Reference Frequency Divider Index = Desired Auxiliary oscillator frequency division ratio - 1.
Default value on power up is 0, signifying that the reference frequency is not divided for the auxiliary
phase detector.
Figure 10: Hex6 Phase Detectors Register (Write only)
This register permits control of the gain for both phase detectors, and configuration of the LD/PS pins for
frequency power steering or lock detection.
Main Reference Frequency Divider Index
A3
0
1
2
3
4
5
6
7
8
9
10
11
0
A0
A1
A2
1
0
1
X
X
Auxiliary Reference Frequency Divider Index
Main Phase Detector Gain
Main Power Steering/Lock Detect Enable
A3
0
1
2
3
4
5
6
7
8
9
10
11
0
A0
A1
A2
1
1
0
Auxiliary Phase Detector Gain
Auxiliary Power Steering/Lock Detect Enable
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
