CS5535 datasheet(484/555 Pages) NSC

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484

Revision 0.8

PMC Register Descriptions (Continued)

PM_GPE0_STS Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

PM_GPE0_STS Bit Descriptions

Bit

Name

Description

GPIOM7_PME_

FLAG

GPIO IRQ/PME Mapper Bit 7 PME Flag. If high, this bit records that a PME occurred

via bit 7 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[31]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

GPIOM6_PME_

FLAG

GPIO IRQ/PME Mapper Bit 6 PME Flag. If high, this bit records that a PME occurred

via bit 6 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[30]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

29:22

RSVD

Reserved. Reads return 0; writes have no effect

GPIOM5_PME_

FLAG

GPIO IRQ/PME Mapper Bit 5 PME Flag. If high, this bit records that a PME occurred

via bit 5 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[21]) must be high in order for this PME to be

passed on to the system. Write 1 to clear, writing 0 has no effect.

GPIOM4_PME_

FLAG

GPIO IRQ/PME Mapper Bit 4 PME Flag. If high, this bit records that a PME occurred

via bit 4 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[20]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

GPIOM3_PME_

FLAG

GPIO IRQ/PME Mapper Bit 3 PME Flag. If high, this bit records that a PME occurred

via bit 3 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[19]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

GPIOM2_PME_

FLAG

GPIO IRQ/PME Mapper Bit 2 PME Flag. If high, this bit records that a PME occurred

via bit 2 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[18]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

GPIOM1_PME_

FLAG

GPIO IRQ/PME Mapper Bit 1 PME Flag. If high, this bit records that a PME occurred

via bit 1 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[17]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

GPIOM0_PME_

FLAG

GPIO IRQ/PME Mapper Bit 0PME Flag. If high, this bit records that a PME occurred

via bit 0 of the GPIO IRQ/PME mapper. Both this bit and the corresponding enable bit

PM_GPE0_EN (ACPI I/O Offset 1Ch[16]) must be high in order for this PME to be

passed on to the system. Write 1 to clear; writing 0 has no effect.

15:7

RSVD

Reserved. Reads return 0; writes have no effect

USBC2_PME_

FLAG

USB Controller #2 PME Flag. If high, this bit records that a PME occurred via USB

Controller #2. Both this bit and the corresponding enable bit in

PM_GPE0_EN (ACPI

I/O Offset 1Ch[6]) must be high in order for this PME to be passed on to the system.

Write 1 to clear; writing 0 has no effect.

CS5535 Datasheet(PDF) 484 Page - National Semiconductor (TI)

CS5535 Datasheet(HTML) 484 Page - National Semiconductor (TI)

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