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CS5535 Datasheet(PDF) 486 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 486 Page - National Semiconductor (TI) |
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486 / 555 page ![]() www.national.com 486 Revision 0.8 PMC Register Descriptions (Continued) 30 GPIOM6_PME_ EN GPIO IRQ/PME Mapper Bit 6 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 6 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 29:22 RSVD Reserved. Reads return 0; writes have no effect 21 GPIOM5_PME_ EN GPIO IRQ/PME Mapper Bit 5 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 5 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 20 GPIOM4_PME_ EN GPIO IRQ/PME Mapper Bit 4 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 4 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 19 GPIOM3_PME_ EN GPIO IRQ/PME Mapper Bit 3 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 3 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 18 GPIOM2_PME_ EN GPIO IRQ/PME Mapper Bit 2 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 2 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 17 GPIOM1_PME_ EN GPIO IRQ/PME Mapper Bit 1 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 1 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 16 GPIOM0_PME_ EN GPIO IRQ/PME Mapper Bit 0 PME Enable. When set high, this bit enables the gener- ation of a PME to the system if a PME occurs via bit 0 of the GPIO IRQ/PME mapper. Write this bit low to disable the generation of a PME from this source. 15:7 RSVD Reserved. Reads return 0; writes have no effect 6 USBC2_PME_EN USB Controller #2 PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs via USB Controller #2. Write this bit low to disable the generation of a PME from this source. 5 USBC1_PME_EN USB Controller #1PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs via USB Controller #2. Write this bit low to disable the generation of a PME from this source. 4 UART2_PME_EN UART #2 PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs via UART #2. Write this bit low to disable the generation of a PME from this source. 3 UART1_PME_EN UART #1 PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs via UART #2. Write this bit low to disable the generation of a PME from this source. 2 SMB_PME_EN SMB PME Enable. When set high, this bit enables the generation of a PME to the sys- tem if a PME occurs via the SMB. Write this bit low to disable the generation of a PME from this source. 1 PIC_ASMI_PME_ EN PIC ASMI PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs due to a PIC ASMI. Write this bit low to disable the generation of a PME from this source. 0 PIC_IRQ_PME_ EN PIC Interrupt PME Enable. When set high, this bit enables the generation of a PME to the system if a PME occurs due to a PIC Interrupt. Write this bit low to disable the gen- eration of a PME from this source PM_GPE0_EN Bit Descriptions (Continued) Bit Name Description |
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