CS5535 datasheet(505/555 Pages) NSC

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Flash Controller Register Descriptions (Continued)

NOR Flash Timing for Chip Selects 2 and 3 (NORTF_T23)

5.19.1.3

NAND Flash Data Timing MSR (NANDF_DATA)

Most NAND devices have similar timing. All NAND devices share the timing registers. The valid range for the count values

of setup time and hold time in NAND MSRs is 0 through 7 Local Bus clock (‘lb_c’) cycles or LPC clock (‘lpc_c’) cycles and

MSR Address

5140001Ah

Type

R/W

Reset Value

07770777h

NORTF_T23 Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

tH3

tP3

tS3

RSVD

tH2

tP2

tS2

NORTF_T23 Bit Descriptions

Bit

Name

Description

31:27

RSVD

Reserved. Reads return value written.

26:24

tH3 (Note 1)

Note 1.

The valid range for the count values of setup time, and hold time in NOR MSR registers is 1 through 7 when a

General Purpose device is used (with NOR Controller). If signal FLASH_IOCHRDY is not used by the General Pur-

pose device, then the valid range for the count value of pulse width in NOR MSR registers is 1 through 7. If

FLASH_IOCHRDY is used by the General Purpose device, then the valid range for the count value of pulse width

in NOR MSR registers is 2 through 7. In the case of NOR devices, as NOR Controller doesn’t support the use of

FLASH_IOCHRDY (explained in Section 4.18.2 "NOR Flash Controller/General Purpose Chip Select" on page

171),the valid range for the count values of setup time, pulse width, and hold time in NOR MSR registers is 1

through 7.In the case of NOR Controller’s WE# and RE# strobe pulse widths, if NOR Control MSR register bits[7:4]

(CHKRDY[3:0]) are enabled (active high) in the case of General Purpose devices then the generated pulse widths

will be longer than programmed count value. If setup or hold time in NOR MSR registers is programmed as 0, then

the NOR Controller’s WE# and RE# generation will use 16 as the count value of NOR setup or hold time.

Hold Time for NOR Chip Select 3. Hold from WE# or RE# rising edge to chip select.

Refer to Figure 4-58 "NOR Flash with Wait States Timing" on page 173.

RSVD

Reserved. Reads return value written.

22:20

tP3

Strobe Pulse Width for NOR Chip Select 3. RE# and WE# strobe pulse width. At the

end of the tP, sample the FLASH_ IOCHRDY signal to see if a wait state is needed.

Refer to Figure 4-58 "NOR Flash with Wait States Timing" on page 173.

RSVD

Reserved. Reads return value written.

18:16

tS3 (Note 1)

Setup Time for NOR Chip Select 3. Chip select to WE# or RE# falling edge setup

time. Refer to Figure 4-58 "NOR Flash with Wait States Timing" on page 173.

15:11

RSVD

Reserved. Reads return value written.

10:8

tH2 (Note 1)

Hold Time for NOR Chip Select 2. Hold from WE# or RE# rising edge to chip select.

Refer to Figure 4-58.

RSVD

Reserved. Reads return value written.

6:4

tP2

Strobe Pulse Width for NOR Chip Select 2. RE# and WE# strobe pulse width. At the

end of the tP, sample the FLASH_IOCHRDY signal to see if a wait state is needed.

Refer to Figure 4-58 "NOR Flash with Wait States Timing" on page 173.

RSVD

Reserved. Reads return value written.

2:0

tS2 (Note 1)

Setup Time for NOR Chip Select 2. Chip select to WE# or RE# falling edge setup

time. Refer to Figure 4-58 "NOR Flash with Wait States Timing" on page 173.

MSR Address

5140001Bh

Type

R/W

Reset Value

07770777h

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