MP86998

– INTEGRATED INTELLI-PHASETM SOLUTION IN TLGA PACKAGE

MP86998 Rev. 1.0

www.MonolithicPower.com

5

11/3/2020

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© 2020 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VIN = 12V, VDRV = VDD = EN = 3.3V, TA = 25°C for typical value, TJ = -40°C to 125°C for max and

min values, unless otherwise noted.

Parameter

Symbol

Condition

Min

Typ

Max

Units

IIN shutdown

EN = low

90

180

μA

VIN under-voltage lockout

(UVLO) rising threshold

2.5

3.0

V

VIN UVLO threshold

hysteresis

450

mV

IVDRV quiescent current

PWM = low

250

350

μA

IVDD quiescent current

PWM = low

3

mA

IVDRV operation current (4)

fSW = 500kHz

19.8

mA

fSW = 800kHz

31.7

mA

VDD voltage UVLO rising

threshold

2.75

2.95

V

VDD voltage UVLO threshold

hysteresis

300

mV

High-side current limit (4)

ILIM_FLT

Cycle-by-cycle up to 8 cycles

110

A

Low-side current limit (4)

Negative current limit,

cycle-by-cycle, no fault report

-35

A

Negative current limit low-side

off time (4)

200

ns

High-side current limit

shutdown counter (4)

8

times

Dead time at SW rising (4)

2

ns

Dead time at SW falling (4)

Positive inductor current

6

ns

Negative inductor current

28

ns

EN input high threshold

voltage

2.30

V

EN input low threshold

voltage

0.8

V

PWM high to SW rising delay

(4)

tRISING

20

ns

PWM low to SW falling delay

(4)

tFALLING

20

ns

PWM tri-state to SW Hi-Z

delay (4)

tLT

40

ns

tTL

30

ns

tHT

40

ns

tTH

30

ns

Minimum PWM pulse width (4)

20

ns

IOUT sense gain accuracy (4)

20A ≤ ISW ≤ 80A, TJ = 25°C

-2

0

+2

%

IOUT sense gain

GIOUT

5

μA/A

IOUT sense offset

ISW = 0A, VIOUT = 1.2V,

TJ = 25°C

-2

0

+2

μA

PWM = Hi-Z, VIOUT = 1.2V

-1

0

+1

μA

IOUT pin voltage range (4)

VIOUT

0.7

2.1

V