MP86998

– INTEGRATED INTELLI-PHASETM SOLUTION IN TLGA PACKAGE

MP86998 Rev. 1.0

www.MonolithicPower.com

10

11/3/2020

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OPERATION

The MP86998 is an 80A, monolithic half-bridge

driver with internal MOSFETs. It is well-suited for

multi-phase buck regulators. An external 3.3V

supply is required to supply both VDD and

VDRV. When EN transitions from low to high and

the VDRV signals are sufficiently high, the

device begins operating.

Pulse-Width Modulation (PWM)

The pulse-width modulation (PWM) input pin is

capable of tri-state input. If the PWM input signal

is within the tri-state threshold window for 40ns

(tHT or tLT), the high-side MOSFET (HS-FET)

turns

off

immediately.

Then

the

low-side

MOSFET (LS-FET) enters diode emulation

mode

and

remains

on

until

zero-current

detection (ZCD).

The tri-state PWM input is enabled by forcing a

middle-voltage PWM signal, or by floating the

PWM input. The internal current source charges

the signal to a middle voltage. See the PWM

Timing Diagram on page 5 for the propagation

delay definition from PWM to the SW node.

Diode Emulation Mode

If PWM is either low or in tri-state while operating

in diode emulation mode, the LS-FET turns on

when the inductor current is positive. The LS-

FET turns off if the inductor current is negative or

if it crosses the ZCD threshold. Diode emulation

mode can be enabled by driving PWM to a

middle state or floating PWM.

Current Sense

When EN is high, the IOUT pin is a bidirectional

current source that is proportional to the inductor

current. The current-sense gain is 5

μA/A. If

required, a resistor can be used to configure the

voltage gain proportional to the inductor current.

The IOUT output has two states (see Table 1).

In disable mode (EN = low), the current-sense

circuit is disabled, and IOUT is in a Hi-Z (high

impedance) state.

Table 1: IOUT Output States

PWM

EN

IOUT

PWM

High

Active

-

Low

Hi-Z

The IOUT

pin’s voltage should range between

0.7V and 2.1V to achieve an accurate IOUT

current output of up to +400

μA/-200μA (e.g.

+80A/-40A). Generally, there is a resistor (RIOUT)

connected from IOUT to an external voltage that

is capable of sinking small currents. This

provides a sufficient voltage to meet the required

operating voltage range. Calculate the reference

voltage (VCM) and RIOUT values with Equation (1):

IOUT

IOUT

CM

0.7V

I

R

V

2.1V









(1)

Where VCM is a reference voltage connected to

RIOUT.

IOUT can be estimated with Equation (2):

IOUT

SW

IOUT

I

I

G



(2)

The Intelli-

Phase’sTM current-sense output can

be used by the controller to monitor the output

current accurately. The cycle-by-cycle current

information from IOUT can be used for phase

current balancing, over-current protection (OCP),

and active voltage positioning (output voltage

droop).

Positive and Negative Inductor Current Limit

If an HS-FET over-current (OC) condition is

detected, the HS-FET turns off for that PWM

cycle. If the OC condition remains for eight

consecutive cycles, the HS-FET latches off,

TOUT/FLT pulls high to VDD, and the LS-FET

turns on until ZCD. To release the latch and

restart the device, toggle EN, or cycle the power

on VIN or VDD.

When the LS-FET detects a -35A valley current,

the MP86998 turns off the LS-FET and turns on

the HS-FET for 200ns to limit the negative

current. The LS-FET negative current limit does

not trigger a fault report.

Temperature-Sense

Output

with

Fault

Indication (TOUT/FLT)

The

TOUT/FLT

pin

senses

the

junction

temperature and indicates whether a fault has

occurred.

When VDD exceeds its under-voltage lockout

(UVLO) threshold and the part is active,

TOUT/FLT is a voltage output proportional to the

junction temperature.