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UPD17708 Datasheet(PDF) 264 Page - Renesas Technology Corp

Part # UPD17708
Description  MOS INTEGRATED CIRCUIT
PDF  358 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17708 Datasheet(HTML) 264 Page - Renesas Technology Corp

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µPD17704, 17705, 17707, 17708, 17709
17.4 Phase Comparator (
φ-DET), Charge Pump, and Unlock FF
17.4.1 Configuration of phase comparator, charge pump, and unlock FF
Figure 17-7 shows the configuration of the phase comparator, charge pump, and unlock FF.
The phase comparator compares the phase of the divided frequency “fN” output by the programmable divider with
the phase of the reference frequency “fr” output by the reference frequency generator, and outputs an up (UP) or down
(DW) request signal.
The charge pump outputs the output of the phase comparator from an error out pin (EO1 and EO0 pins).
The unlock FF detects the unlock status of the PLL frequency synthesizer.
17.4.2 through 17.4.4 describe the operations of the phase comparator, charge pump, and unlock FF.
Figure 17-7. Configuration of Phase Comparator, Charge Pump, and Unlock FF
Unlock FF
PLLUL flag
UP
fr
fN
Charge pump
EO1
EO0
Reference frequency
generator
Programmable
divider
DW
PLL disable signal
Phase comparator
( - DET)
φ



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