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UPD17708 Datasheet(PDF) 276 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 276 Page - Renesas Technology Corp |
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276 / 358 page  274 µPD17704, 17705, 17707, 17708, 17709 Figure 18-3. Configuration of IF Counter Mode Selection Register Caution The IF counter and external gate counter functions cannot be used at the same time. Name Flag symbol b3 I F C M D 1 b2 I F C M D 0 b1 I F C C K 1 b0 I F C C K 0 Address 22H Read/Write R/W IF counter mode selection Power-ON reset WDT&SP reset CE reset Clock stop 0 1 0 1 0 0 0 0 1 ms 4 ms 8 ms Open 1 kHz 100 kHz 900 kHz Setting prohibited Selects gate time of IF counter and reference frequency of external gate counter Gate time of IF counter Reference frequency of external gate counter 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 1 External gate counter (FCG) IF counter (AMIFC pin, AMIF count mode) IF counter (FMIFC pin, FMIF count mode, 1/2 division) IF counter (FMIFC pin, AMIF count mode) Selects function of IF counter or external gate counter 0 0 1 1 |
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