UPD17708 datasheet(278/358 Pages) RENESAS

278 / 358 page

276

µPD17704, 17705, 17707, 17708, 17709

18.3 Start/Stop Control Block and IF Counter

18.3.1 Configuration of start/stop control block and IF counter

Figure 18-5 shows the configuration of the start/stop control block and IF counter.

The start/stop control block starts the frequency counter or detects the end of counting.

The counter is started by the IF counter control register.

The end of counting is detected by the IF counter gate status detection register. When the external gate counter

function is used, however, the end of counting cannot be detected by the IF counter gate status detection register.

Figure 18-6 shows the configuration of the IF counter control register.

Figure 18-7 shows the configuration of the IF counter gate status detection register.

18.3.2 and 18.3.3 describe the gate operation when the IF counter function is selected and that when the external

gate counter function is selected.

The IF counter is a 16-bit binary counter that counts up the input frequency when the IF counter function or external

gate counter function is selected.

When the IF counter function is selected, the frequency input to a selected pin is counted while the gate is opened

by an internal gate signal. The frequency count is counted without alteration in the AMIF count mode. In the FMIF

counter mode, however, the frequency input to the pin is halved and counted.

When the external gate counter function is selected, the internal frequency is counted while the gate is opened

by the signal input to the pin.

When the IF counter counts up to FFFFH, it remains at FFFFH until reset.

The count value is read by the IF counter data register (IFC) via data buffer.

The count value is reset by the IF counter control register.

Figure 18-8 shows the configuration of the IF counter data register.

Figure 18-5. Configuration of Start/Stop Control Block and IF Counter

Start/Stop

control

IF counter

(16 bits)

IF counter data

DBF

IFCSTRT flag

IFCRES flag

IFCGOSTT flag

Gate signal

Frequency

From gate time

selection block

RES

UPD17708 Datasheet(PDF) 278 Page - Renesas Technology Corp