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UPD17708 Datasheet(PDF) 280 Page - Renesas Technology Corp |
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UPD17708 Datasheet(HTML) 280 Page - Renesas Technology Corp |
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280 / 358 page  278 µPD17704, 17705, 17707, 17708, 17709 Figure 18-7. Configuration of IF Counter Gate Status Detection Register Cautions 1. Do not read the contents of the IF counter data register (IFC) to the data buffer while the IFCGOSTT flag is set to 1. 2. The gate of the external gate counter cannot be opened or closed by the IFCGOSTT flag. Use the IFCSTRT flag to open or close the gate. Name Flag symbol b3 0 b2 0 b1 0 b0 I F C G O S T T Address 21H Read/Write R IF counter gate status detection 0 1 Detects opening/closing of gate of frequency counter When IF counter function is selected When external gate counter function is selected Fixed to “0” Power-ON reset WDT&SP reset CE reset Clock stop 0 0 0 0 0 00 Sets IFCSTRT flag to “1” and is set to 1 until gate is closed Sets IFCSTRT flag to “1” and is set to 1 while gate is open, regardless of input of P2A0/FCG0 and P2A1/FCG1 pins |
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