UPD17708 datasheet(282/358 Pages) RENESAS

282 / 358 page

280

µPD17704, 17705, 17707, 17708, 17709

(a) Resetting the gate to other than open by using IFCCK1 and IFCCK0 flags

(b) Unselect pin used by using IFCMD1 and IFCMD0 flags

In this way, the gate remains open, and counting is stopped by disabling input from the pin.

18.3.3 Gate operation when external gate counter function is selected

The gate is opened from the rising to the next rising of the signal input to a selected pin after the IFCSTRT flag

has been set to 1, as illustrated below.

While the gate is open, the internal frequency (1 kHz, 100 kHz, 900 kHz) is counted by a 16-bit counter.

The IFCGOSTT flag is set to 1 from the rising to the next rising of the external signal after the IFCSTRT flag has

been set.

In other words, the opening or closing of the gate cannot be detected by the IFCG flag when the external gate

counter function is selected.

If reset and started while gate is open

IFCCK1 = IFCCK0 = 1

Count period

Resetting the gate to other than open

by IFCCK1 and IFCCK0 flags

OPEN

Gate

OPEN

Sets IFCCK1 = IFCCK0 = 1

Count period

Sets IFCMD1 = IFCMD0 = 0 (FCG)

FMIFC and AMIFC pins are unselected and

count signal cannot be input

OPEN

External signal

Gate

Count period

Gate is opened at

this point

End of counting

IFCGOSTT flag is “0”

IFCSTRT flag

← 1

OPEN

External signal

Gate

Count period

IFCSTRT flag

← 1

Gate is opened at

this point

End of counting

IFCGOSTT flag is “0”

IFCSTRT flag

← 1

UPD17708 Datasheet(PDF) 282 Page - Renesas Technology Corp

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