MPQ4480 – 36V, 6A, SYNC STEP-DOWN CONVERTER FOR AEC1-Q100 QUALIFIED

MPQ4480 Rev. 1.0

www.MonolithicPower.com

14

7/2/2019

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OPERATION

The

MPQ4480

integrates

a

monolithic,

synchronous, rectified, step-down, switch-mode

converter with internal power MOSFETs. It

offers a compact solution to achieve 6A of

continuous output current over a wide input

supply range with excellent load and line

regulation.

The MPQ4480 operates in a fixed-frequency,

peak current mode control to regulate the

output voltage. The internal clock initiates the

PWM cycle, which turns on the integrated high-

side MOSFET (HS-FET). The HS-FET remains

on until its current reaches the value set by the

COMP voltage. When the power switch is off, it

remains off until the next clock cycle begins.

Low-Dropout Operation

The operation frequency auto-decreases when

the input voltage is close to the output voltage,

helping the part achieve a low dropout voltage.

Error Amplifier (EA)

The error amplifier (EA) compares the internal

feedback voltage against the internal 1V

reference (REF), and outputs a COMP voltage.

This COMP voltage controls the power

MOSFET

current. The optimized internal

compensation network minimizes the external

component count and simplifies control loop

design.

Internal VCC Regulator

The 5.05V internal regulator powers most of the

internal circuitries. This regulator takes VIN and

operates in the full VIN range. When VIN

exceeds 5.05V, the output of the regulator is in

full regulation. If VIN is less than 5.05V, the

output decreases with VIN. VCC requires an

external 1µF ceramic decoupling capacitor.

Enable Control (EN)

The MPQ4480 has an enable control (EN).

There is an internal 7μA pull-up current, which

allows auto start-up if EN is floated. Pull EN

high or float to enable the IC; pull EN low to

disable the IC. EN is clamped internally using a

7.6V series Zener diode and a 10V breakdown

voltage ESD cell (see Figure 2).

It is recommended to connect EN to VIN and

GND through divider resistors. When selecting

a pull-up resistor, ensure that it is large enough

to limit the current flow into EN to below 100µA.

For example, if the EN pull-up resistor is 100kΩ

and the pull-down resistor is 110kΩ, the IC will

power up when VIN exceeds the UVLO rising

threshold.

EN

Logic

EN

GND

100kΩ

7.6V

ESD

10V

7µA

Figure 2: Zener Diode Between EN and GND

Setting the Frequency

Connect a resistor from FREQ to ground to set

the switching frequency. The value of the

frequency can be estimated with Equation (1):

1000

()

0.04

(

) 0.1

FREQ

FREQ kHz

Rk



 

(1)

Figure 3 shows the frequency vs. RFREQ.

200

600

1000

1400

1800

2200

0

20406080

100

120

140

FREQUENCY PROGRAMMABLE RESISTOR (kΩ)

Figure 3: Switching Frequency vs RFREQ

For the MPQ4480, the FREQ pin cannot be left

floating or tied to VCC or GND. FREQ should

be connected to GND through a resistor.

To avoid tripping the minimum on time limitation

in high-frequency and high input voltage

conditions, the MPQ4480 employs frequency

foldback. When fSW exceeds 1.2MHz and VIN is

above 15V, the device decreases the switching

frequency gradually until the frequency falls to

half of the setting value.